[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Chen-Yu Tsai]

Hi,

On Tue, Dec 9, 2014 at 2:53 AM, Hans de Goede <hdegoede at redhat.com> wrote:
> Hi,
>
> On 08-12-14 15:28, Chen-Yu Tsai wrote:
>>
>> On Mon, Dec 8, 2014 at 4:27 AM, Hans de Goede <hdegoede at redhat.com> wrote:
>>>
>>> Hi,
>>>
>>> This is still a bit rough around the edges, I'll clean it up as
>>> time permits and then post it upstream.
>>>
>>> In the mean time people interested can find $subject here:
>>> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-wip
>>
>>
>> Hopefully I'll get around to testing this. BTW, what tablet do
>> you have?
>
>
> I've an Ippo q8h v1.2, there are at least 2 differences from the
> v5 you've. The dram clk speed and zq value are different, and the wifi
> is different. The wifi does not matter for u-boot, but does mean we
> need separate dtb files for the 2.
>
> My u-boot sunxi-wip branch has a defconfig for the v1.2, you should be
> able to copy that over to the v5 defconfig, adjust dram clk and zq values
> with the ones from the v5 fix, change v1.2 to v5 in the CONFIG_FDTFILE
> setting and thats it.
>
> Let me know if this works, then I'll also include an update for the v5
> defconfig to enable the SPL when I send this upstream.

Just gave it a spin, and it works. The dram clock and zq can be
found in sunxi-boards. Note that the actual settings fetched from
stock u-boot has the highest bit of tpr13 set, disabling auto
detection AFAICU. As you've not implemented that part, I used
auto detection and it seems to work.

The only problem I have now is it has no connectivity to the
outside world lol. I would've liked a v2, with a Realtek USB
WiFi chip. What chip does the v1.2 have?

>>> ChenYu, this also has a mmc fix which you may find interesting,
>>> it may explain some of the problems with mmc you've been having
>>> on both the A80 board, as well as the A31 dev board you've.
>>
>>
>> Yes. With that fix my Hummingbird A31 boots properly without
>> raising DCDC1 to 3.3V.
>>
>> Thanks! I'll send the defconfig out later.
>
>
> Good, so I guess this means that DCDC1 should be 3V for your board,
> since that is what the factory firmware uses, right ?
>
> I guess it is time to make DCDC1 voltage configurable.

3V seems to be the lowest tolerable voltage for some bits. Making it
3.3V might be a bit better. But with my light usage, I don't see any
stability issues.

ChenYu