[U-Boot] [PATCH v3 2/2] x86: ich-spi: Set the tx operation mode for ich 7

[Simon Glass]

Hi Bin,

On 10 December 2014 at 19:55, Bin Meng <bmeng.cn at gmail.com> wrote:
> Hi Simon,
>
> On Thu, Dec 11, 2014 at 10:50 AM, Simon Glass <sjg at chromium.org> wrote:
>> Hi Bin,
>>
>> On 10 December 2014 at 01:38, Bin Meng <bmeng.cn at gmail.com> wrote:
>>> ICH 7 SPI controller only supports byte program (02h) for SST flash.
>>> Word program (ADh) is not supported.
>>>
>>> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>>>
>>> ---
>>> Split from my v2 patch @ http://patchwork.ozlabs.org/patch/405753/
>>> This needs to be applied after Jagan's new patch series:
>>> http://patchwork.ozlabs.org/patch/419154/
>>>
>>>  drivers/spi/ich.c | 9 +++++++--
>>>  1 file changed, 7 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
>>> index c38df08..0379444 100644
>>> --- a/drivers/spi/ich.c
>>> +++ b/drivers/spi/ich.c
>>> @@ -141,9 +141,14 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
>>>         ich->slave.max_write_size = ctlr.databytes;
>>>         ich->speed = max_hz;
>>>
>>> -       /* ICH 7 SPI controller only supports array read command */
>>> -       if (ctlr.ich_version == 7)
>>> +       /*
>>> +        * ICH 7 SPI controller only supports array read command
>>> +        * and byte program command for SST flash
>>> +        */
>>> +       if (ctlr.ich_version == 7) {
>>>                 ich->slave.op_mode_rx = SPI_OPM_RX_AS;
>>> +               ich->slave.op_mode_tx = SPI_OPM_TX_BP;
>>> +       }
>>>
>>>         return &ich->slave;
>>>  }
>>> --
>>> 1.8.2.1
>>>
>>
>> This causes a build error on coreboot-x86 (SPI_OPM_TX_BP undeclared).
>>
>
> I think you need apply Jagan's patch series first @
> http://patchwork.ozlabs.org/patch/419154/

OK, so I suppose I could apply it to x86 so long as I don't send a
pull request before Jagan. But it might be better just to wait.

Regards,
Simon