[U-Boot] [PATCH] dm: sh: serial: Add support driver model
Nobuhiro Iwamatsu
nobuhiro.iwamatsu.yj at renesas.com
Fri Dec 12 02:51:34 CET 2014
Hi,
Thanks for your review.
2014-12-11 13:49 GMT+09:00 Simon Glass <sjg at chromium.org>:
> Hi Nobuhiro,
>
> On 9 December 2014 at 22:44, Nobuhiro Iwamatsu
> <nobuhiro.iwamatsu.yj at renesas.com> wrote:
>> This adds driver model support with this driver. This was tested by Koelsch
>> board and Gose board.
>>
>> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj at renesas.com>
>> ---
>> drivers/serial/serial_sh.c | 299 ++++++++++++++++++++++++-----------
>> drivers/serial/serial_sh.h | 10 +-
>> include/dm/platform_data/serial_sh.h | 37 +++++
>> 3 files changed, 245 insertions(+), 101 deletions(-)
>> create mode 100644 include/dm/platform_data/serial_sh.h
>>
>
> Nice to see this patch.
>
>> diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
>> index 7c1f271..dd5f9bf 100644
>> --- a/drivers/serial/serial_sh.c
>> +++ b/drivers/serial/serial_sh.c
>> @@ -1,78 +1,20 @@
>> /*
>> * SuperH SCIF device driver.
>> * Copyright (C) 2013 Renesas Electronics Corporation
>> - * Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu
>> + * Copyright (C) 2007,2008,2010, 2014 Nobuhiro Iwamatsu
>> * Copyright (C) 2002 - 2008 Paul Mundt
>> *
>> * SPDX-License-Identifier: GPL-2.0+
>> */
>>
>> #include <common.h>
>> +#include <dm.h>
>> #include <asm/io.h>
>> #include <asm/processor.h>
>> -#include "serial_sh.h"
>> #include <serial.h>
>> #include <linux/compiler.h>
>> -
>> -#if defined(CONFIG_CONS_SCIF0)
>> -# define SCIF_BASE SCIF0_BASE
>> -#elif defined(CONFIG_CONS_SCIF1)
>> -# define SCIF_BASE SCIF1_BASE
>> -#elif defined(CONFIG_CONS_SCIF2)
>> -# define SCIF_BASE SCIF2_BASE
>> -#elif defined(CONFIG_CONS_SCIF3)
>> -# define SCIF_BASE SCIF3_BASE
>> -#elif defined(CONFIG_CONS_SCIF4)
>> -# define SCIF_BASE SCIF4_BASE
>> -#elif defined(CONFIG_CONS_SCIF5)
>> -# define SCIF_BASE SCIF5_BASE
>> -#elif defined(CONFIG_CONS_SCIF6)
>> -# define SCIF_BASE SCIF6_BASE
>> -#elif defined(CONFIG_CONS_SCIF7)
>> -# define SCIF_BASE SCIF7_BASE
>> -#else
>> -# error "Default SCIF doesn't set....."
>> -#endif
>> -
>> -#if defined(CONFIG_SCIF_A)
>> - #define SCIF_BASE_PORT PORT_SCIFA
>> -#else
>> - #define SCIF_BASE_PORT PORT_SCIF
>> -#endif
>> -
>> -static struct uart_port sh_sci = {
>> - .membase = (unsigned char*)SCIF_BASE,
>> - .mapbase = SCIF_BASE,
>> - .type = SCIF_BASE_PORT,
>> -};
>> -
>> -static void sh_serial_setbrg(void)
>> -{
>> - DECLARE_GLOBAL_DATA_PTR;
>> -#ifdef CONFIG_SCIF_USE_EXT_CLK
>> - unsigned short dl = DL_VALUE(gd->baudrate, CONFIG_SH_SCIF_CLK_FREQ);
>> - sci_out(&sh_sci, DL, dl);
>> - /* Need wait: Clock * 1/dl × 1/16 */
>> - udelay((1000000 * dl * 16 / CONFIG_SYS_CLK_FREQ) * 1000 + 1);
>> -#else
>> - sci_out(&sh_sci, SCBRR,
>> - SCBRR_VALUE(gd->baudrate, CONFIG_SH_SCIF_CLK_FREQ));
>> -#endif
>> -}
>> -
>> -static int sh_serial_init(void)
>> -{
>> - sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci));
>> - sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci));
>> - sci_out(&sh_sci, SCSMR, 0);
>> - sci_out(&sh_sci, SCSMR, 0);
>> - sci_out(&sh_sci, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
>> - sci_in(&sh_sci, SCFCR);
>> - sci_out(&sh_sci, SCFCR, 0);
>> -
>> - serial_setbrg();
>> - return 0;
>> -}
>> +#include <dm/platform_data/serial_sh.h>
>> +#include "serial_sh.h"
>>
>> #if defined(CONFIG_CPU_SH7760) || \
>> defined(CONFIG_CPU_SH7780) || \
>> @@ -109,83 +51,249 @@ static int scif_rxfill(struct uart_port *port)
>> }
>> #endif
>>
>> -static int serial_rx_fifo_level(void)
>> +static void sh_serial_init_generic(struct uart_port *port)
>> +{
>> + sci_out(port, SCSCR , SCSCR_INIT(port));
>> + sci_out(port, SCSCR , SCSCR_INIT(port));
>> + sci_out(port, SCSMR, 0);
>> + sci_out(port, SCSMR, 0);
>> + sci_out(port, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
>> + sci_in(port, SCFCR);
>> + sci_out(port, SCFCR, 0);
>> +}
>> +
>> +static void
>> +sh_serial_setbrg_generic(struct uart_port *port, int clk, int baudrate)
>> {
>> - return scif_rxfill(&sh_sci);
>> + if (port->clk_mode == EXT_CLK) {
>> + unsigned short dl = DL_VALUE(baudrate, clk);
>> + sci_out(port, DL, dl);
>> + /* Need wait: Clock * 1/dl × 1/16 */
>> + udelay((1000000 * dl * 16 / clk) * 1000 + 1);
>> + } else {
>> + sci_out(port, SCBRR, SCBRR_VALUE(baudrate, clk));
>> + }
>> }
>>
>> -static void handle_error(void)
>> +static void handle_error(struct uart_port *port)
>> {
>> - sci_in(&sh_sci, SCxSR);
>> - sci_out(&sh_sci, SCxSR, SCxSR_ERROR_CLEAR(&sh_sci));
>> - sci_in(&sh_sci, SCLSR);
>> - sci_out(&sh_sci, SCLSR, 0x00);
>> + sci_in(port, SCxSR);
>> + sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
>> + sci_in(port, SCLSR);
>> + sci_out(port, SCLSR, 0x00);
>> }
>>
>> -static void serial_raw_putc(const char c)
>> +static void serial_raw_putc(struct uart_port *port, const char c)
>> {
>> while (1) {
>> /* Tx fifo is empty */
>> - if (sci_in(&sh_sci, SCxSR) & SCxSR_TEND(&sh_sci))
>> + if (sci_in(port, SCxSR) & SCxSR_TEND(port))
>> break;
>> }
>
> There should be no loop. Just return -EAGAIN if you cannot write.
OK, I will fix this.
>
>>
>> - sci_out(&sh_sci, SCxTDR, c);
>> - sci_out(&sh_sci, SCxSR, sci_in(&sh_sci, SCxSR) & ~SCxSR_TEND(&sh_sci));
>> + sci_out(port, SCxTDR, c);
>> + sci_out(port, SCxSR, sci_in(port, SCxSR) & ~SCxSR_TEND(port));
>> }
>>
>> -static void sh_serial_putc(const char c)
>> +static void sh_serial_putc_generic(struct uart_port *port, const char c)
>> {
>> if (c == '\n')
>> - serial_raw_putc('\r');
>> - serial_raw_putc(c);
>> + serial_raw_putc(port, '\r');
>
> You don't need to write \r when you see \n. Driver model does this.
likewise.
>
>> + serial_raw_putc(port, c);
>> }
>>
>> -static int sh_serial_tstc(void)
>> +static int serial_rx_fifo_level(struct uart_port *port)
>> {
>> - if (sci_in(&sh_sci, SCxSR) & SCIF_ERRORS) {
>> - handle_error();
>> + return scif_rxfill(port);
>> +}
>> +
>> +static int sh_serial_tstc_generic(struct uart_port *port)
>> +{
>> + if (sci_in(port, SCxSR) & SCIF_ERRORS) {
>> + handle_error(port);
>> return 0;
>> }
>>
>> - return serial_rx_fifo_level() ? 1 : 0;
>> + return serial_rx_fifo_level(port) ? 1 : 0;
>> }
>>
>> -
>> -static int serial_getc_check(void)
>> +static int serial_getc_check(struct uart_port *port)
>> {
>> unsigned short status;
>>
>> - status = sci_in(&sh_sci, SCxSR);
>> + status = sci_in(port, SCxSR);
>>
>> if (status & SCIF_ERRORS)
>> - handle_error();
>> - if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci))
>> - handle_error();
>> - return status & (SCIF_DR | SCxSR_RDxF(&sh_sci));
>> + handle_error(port);
>> + if (sci_in(port, SCLSR) & SCxSR_ORER(port))
>> + handle_error(port);
>> + return status & (SCIF_DR | SCxSR_RDxF(port));
>> }
>>
>> -static int sh_serial_getc(void)
>> +static int sh_serial_getc_generic(struct uart_port *port)
>> {
>> unsigned short status;
>> char ch;
>>
>> - while (!serial_getc_check())
>> + while (!serial_getc_check(port))
>> ;
>
> There should be no loop. Just return -EAGAIN if you cannot read.
likewise.
>
>>
>> - ch = sci_in(&sh_sci, SCxRDR);
>> - status = sci_in(&sh_sci, SCxSR);
>> + ch = sci_in(port, SCxRDR);
>> + status = sci_in(port, SCxSR);
>>
>> - sci_out(&sh_sci, SCxSR, SCxSR_RDxF_CLEAR(&sh_sci));
>> + sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
>>
>> if (status & SCIF_ERRORS)
>> - handle_error();
>> + handle_error(port);
>> +
>> + if (sci_in(port, SCLSR) & SCxSR_ORER(port))
>> + handle_error(port);
>>
>> - if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci))
>> - handle_error();
>> return ch;
>> }
>>
>> +#ifdef CONFIG_DM_SERIAL
>
> How about just convert all SH boards to driver model?
I have this plan, of course. But I think that start form rmobile first.
Best regards,
Nobuhiro
--
Nobuhiro Iwamatsu
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