[U-Boot] [PATCH v4 04/15] x86: ich6-gpio: Add Intel Tunnel Creek GPIO support

Simon Glass sjg at chromium.org
Wed Dec 17 15:56:26 CET 2014


On 17 December 2014 at 00:50, Bin Meng <bmeng.cn at gmail.com> wrote:
> Intel Tunnel Creek GPIO register block is compatible with current
> ich6-gpio driver, except the offset and content of GPIO block base
> address register in the LPC PCI configuration space are different.
>
> Use u16 instead of u32 to store the 16-bit I/O address of the GPIO
> registers so that it could support both Ivybridge and Tunnel Creek.
>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> Acked-by: Simon Glass <sjg at chromium.org>
>
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
> - Add a comment to explain we don't need check bit0 in GPIO base
>   address register
> - Add setup_pch_gpios() in crownbay.c
>
>  arch/x86/include/asm/arch-queensbay/gpio.h | 13 +++++++++++++
>  arch/x86/include/asm/gpio.h                |  4 ++--
>  board/coreboot/coreboot/coreboot.c         |  2 +-
>  board/google/chromebook_link/link.c        |  2 +-
>  board/intel/crownbay/crownbay.c            |  5 +++++
>  drivers/gpio/intel_ich6_gpio.c             | 20 ++++++++++++--------
>  6 files changed, 34 insertions(+), 12 deletions(-)
>  create mode 100644 arch/x86/include/asm/arch-queensbay/gpio.h

Applied to u-boot-x86, thanks!


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