[U-Boot] Please pull u-boot-x86.git
Simon Glass
sjg at chromium.org
Fri Dec 19 01:29:39 CET 2014
Hi Tom,
Here is the last of the Atom changes - we now have good support for
one Atom variant (with a path to adding to it) and basic support for
ivybridge. A good start.
The following changes since commit d8bec60c1b0de7770f9b56ad092ab9be801d99af:
ARM: UniPhier: enable CONFIG_CMD_DM (2014-12-18 23:34:30 +0900)
are available in the git repository at:
git://git.denx.de/u-boot-x86.git
for you to fetch changes up to d2c6181d2d2afe00399cf0c8d9deafcb66b77330:
x86: Add a script to process Intel microcode files (2014-12-18 17:26:08 -0700)
----------------------------------------------------------------
Bin Meng (14):
x86: Integrate Tunnel Creek processor microcode
x86: Add basic support to queensbay platform and crownbay board
x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
x86: Enable the queensbay cpu directory build
x86: Add queensbay and crownbay Kconfig files
x86: Add crownbay defconfig and config.h
x86: Use consistent name XXX_ADDR for binary blob flash address
x86: Include FSP and CMC binary in the u-boot.rom build rules
x86: crownbay: Add SPI flash support
x86: crownbay: Enable Intel E1000 NIC support
x86: crownbay: Add SDHCI support
x86: Rename coreboot-serial to x86-serial
x86: Add a README.x86 for U-Boot on x86 support
x86: Clean up the FSP support codes
Simon Glass (9):
x86: ifdtool: Correct a debug() missing parameter
x86: ifdtool: Display filename when file errors are reported
x86: ifdtool: Use a structure for the file/address list
x86: ifdtool: Add support for early microcode access
x86: Move microcode updates into a separate directory
x86: ivybridge: Update the microcode
x86: Correct problems in the microcode loading
x86: Convert microcode format to device-tree-only
x86: Add a script to process Intel microcode files
Makefile | 16 +-
arch/x86/Kconfig | 13 ++
arch/x86/cpu/Makefile | 1 +
arch/x86/cpu/ivybridge/microcode_intel.c | 27 ++-
arch/x86/cpu/ivybridge/sdram.c | 2 +-
arch/x86/cpu/queensbay/Kconfig | 79 +++++++
arch/x86/cpu/queensbay/Makefile | 9 +
arch/x86/cpu/queensbay/fsp_configs.c | 2 +-
arch/x86/cpu/queensbay/fsp_support.c | 255
++++++++++----------
arch/x86/cpu/queensbay/tnc.c | 72 ++++++
arch/x86/cpu/queensbay/tnc_car.S | 124 ++++++++++
arch/x86/cpu/queensbay/tnc_dram.c | 78 +++++++
arch/x86/cpu/queensbay/tnc_pci.c | 61 +++++
arch/x86/cpu/queensbay/topcliff.c | 47 ++++
arch/x86/dts/coreboot.dtsi | 2 +-
arch/x86/dts/crownbay.dts | 7 +
arch/x86/dts/link.dts | 4 +-
arch/x86/dts/m12206a7_00000028.dtsi | 622
-------------------------------------------------
arch/x86/dts/m12306a9_00000017.dtsi | 750
-----------------------------------------------------------
arch/x86/dts/microcode/m0220661105_cv.dtsi | 368
+++++++++++++++++++++++++++++
arch/x86/dts/microcode/m12206a7_00000029.dtsi | 686
++++++++++++++++++++++++++++++++++++++++++++++++++++++
arch/x86/dts/microcode/m12306a9_0000001b.dtsi | 814
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h | 18 +-
arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h | 28 +--
arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h | 14 +-
arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h | 112 +++++----
arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h | 6 +-
arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h | 8 +-
arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h | 63 ++---
arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h | 17 +-
arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h | 8 +-
arch/x86/include/asm/arch-queensbay/gpio.h | 13 ++
arch/x86/include/asm/arch-queensbay/tnc.h | 15 ++
arch/x86/include/asm/gpio.h | 4 +-
arch/x86/include/asm/ibmpc.h | 3 +
arch/x86/lib/cmd_hob.c | 22 +-
board/coreboot/coreboot/coreboot.c | 2 +-
board/google/chromebook_link/link.c | 2 +-
board/intel/crownbay/Kconfig | 20 ++
board/intel/crownbay/MAINTAINERS | 6 +
board/intel/crownbay/Makefile | 7 +
board/intel/crownbay/crownbay.c | 32 +++
board/intel/crownbay/start.S | 9 +
configs/crownbay_defconfig | 6 +
doc/README.x86 | 126 ++++++++++
drivers/gpio/intel_ich6_gpio.c | 20 +-
drivers/serial/Makefile | 2 +-
drivers/serial/{serial_coreboot.c => serial_x86.c} | 12 +-
include/configs/chromebook_link.h | 6 +-
include/configs/coreboot.h | 2 +-
include/configs/crownbay.h | 61 +++++
tools/Makefile | 1 +
tools/ifdtool.c | 161 +++++++++++--
tools/microcode-tool | 1 +
tools/microcode-tool.py | 253
++++++++++++++++++++
55 files changed, 3381 insertions(+), 1718 deletions(-)
create mode 100644 arch/x86/cpu/queensbay/Kconfig
create mode 100644 arch/x86/cpu/queensbay/Makefile
create mode 100644 arch/x86/cpu/queensbay/tnc.c
create mode 100644 arch/x86/cpu/queensbay/tnc_car.S
create mode 100644 arch/x86/cpu/queensbay/tnc_dram.c
create mode 100644 arch/x86/cpu/queensbay/tnc_pci.c
create mode 100644 arch/x86/cpu/queensbay/topcliff.c
delete mode 100644 arch/x86/dts/m12206a7_00000028.dtsi
delete mode 100644 arch/x86/dts/m12306a9_00000017.dtsi
create mode 100644 arch/x86/dts/microcode/m0220661105_cv.dtsi
create mode 100644 arch/x86/dts/microcode/m12206a7_00000029.dtsi
create mode 100644 arch/x86/dts/microcode/m12306a9_0000001b.dtsi
create mode 100644 arch/x86/include/asm/arch-queensbay/gpio.h
create mode 100644 arch/x86/include/asm/arch-queensbay/tnc.h
create mode 100644 board/intel/crownbay/Kconfig
create mode 100644 board/intel/crownbay/MAINTAINERS
create mode 100644 board/intel/crownbay/Makefile
create mode 100644 board/intel/crownbay/crownbay.c
create mode 100644 board/intel/crownbay/start.S
create mode 100644 configs/crownbay_defconfig
create mode 100644 doc/README.x86
rename drivers/serial/{serial_coreboot.c => serial_x86.c} (67%)
create mode 100644 include/configs/crownbay.h
create mode 120000 tools/microcode-tool
create mode 100755 tools/microcode-tool.py
Regards,
Simon
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