[U-Boot] [PATCH v2 03/11] arch/powerpc: Add SGMII support for the L2 Switch ports

Codrin Ciubotariu codrin.ciubotariu at freescale.com
Fri Dec 19 18:02:01 CET 2014


Some Freescale SoCs like T1020 and T1040 have an integrated
L2 Switch. The L2 Switch ports may be connected to Ethernet PHYs
over SGMII and QSGMII.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu at freescale.com>
Change-Id: Idadad19d469efc45f03c6f8884c3647e02b28df4
---
 arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 6 ++++++
 arch/powerpc/cpu/mpc85xx/t1040_serdes.c        | 8 ++++----
 arch/powerpc/include/asm/fsl_serdes.h          | 6 ++++++
 3 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index f8e6c00..03c4642 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -78,6 +78,12 @@ static const char *serdes_prtcl_str[] = {
 	[INTERLAKEN] = "INTERLAKEN",
 	[QSGMII_SW1_A] = "QSGMII_SW1_A",
 	[QSGMII_SW1_B] = "QSGMII_SW1_B",
+	[SGMII_SW1_MAC1] = "SGMII_SW1_MAC1",
+	[SGMII_SW1_MAC2] = "SGMII_SW1_MAC2",
+	[SGMII_SW1_MAC3] = "SGMII_SW1_MAC3",
+	[SGMII_SW1_MAC4] = "SGMII_SW1_MAC4",
+	[SGMII_SW1_MAC5] = "SGMII_SW1_MAC5",
+	[SGMII_SW1_MAC6] = "SGMII_SW1_MAC6",
 };
 #endif
 
diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
index d86bb27..d5dccd5 100644
--- a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
@@ -33,10 +33,10 @@ static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
 		PCIE2, PCIE2, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5},
 	[0x87] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
 		PCIE2, PCIE3, PCIE4, SGMII_FM1_DTSEC5},
-	[0x89] = {PCIE1, QSGMII_SW1_A, QSGMII_SW1_A, QSGMII_SW1_A,
-		PCIE2, PCIE3, QSGMII_SW1_B, SATA1},
-	[0x8D] = {PCIE1, QSGMII_SW1_A, QSGMII_SW1_A, QSGMII_SW1_A,
-		PCIE2, QSGMII_SW1_B, QSGMII_SW1_B, QSGMII_SW1_B},
+	[0x89] = {PCIE1, SGMII_SW1_MAC3, SGMII_SW1_MAC1, SGMII_SW1_MAC2,
+		PCIE2, PCIE3, SGMII_SW1_MAC4, SATA1},
+	[0x8D] = {PCIE1, SGMII_SW1_MAC3, SGMII_SW1_MAC1, SGMII_SW1_MAC2,
+		PCIE2, SGMII_SW1_MAC6, SGMII_SW1_MAC4, SGMII_SW1_MAC5},
 	[0x8F] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
 		AURORA, NONE, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5},
 	[0xA5] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h
index 2dd32c2..45e248e 100644
--- a/arch/powerpc/include/asm/fsl_serdes.h
+++ b/arch/powerpc/include/asm/fsl_serdes.h
@@ -87,6 +87,12 @@ enum srds_prtcl {
 	SGMII_2500_FM2_DTSEC6,
 	SGMII_2500_FM2_DTSEC9,
 	SGMII_2500_FM2_DTSEC10,
+	SGMII_SW1_MAC1,
+	SGMII_SW1_MAC2,
+	SGMII_SW1_MAC3,
+	SGMII_SW1_MAC4,
+	SGMII_SW1_MAC5,
+	SGMII_SW1_MAC6,
 	SERDES_PRCTL_COUNT	/* Keep this item the last one */
 };
 
-- 
1.7.11.7



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