[U-Boot] [PATCH v2 0/4] sun8i: Remaining sun8i SPL support patches

[Chen-Yu Tsai]

Hi Hans,

On Sat, Dec 20, 2014 at 7:29 PM, Hans de Goede <hdegoede at redhat.com> wrote:
> Hi Ian, et al,
>
> Here is a v2 of the A23 patches which did not pass review in v1 (so not a
> resend of the whole set).
>

I just built a new u-boot for my Q8H tablet this morning against

  289dcd4 sunxi: video: Set input sync enable

and it works nicely. One thing that's not correct, but isn't an immediate
issue is that PLL1 is different between sun6i and sun8i. See:

    https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/diff/drivers/clk/sunxi/clk-sunxi.c?id=515c1a4

This results in the CPU clock speed being only 504 MHz instead of the
configured 1008 MHz full speed. As I said, it's not an immediate issue.
In the future with cpufreq, it shouldn't matter either.


Also if you're building linux-next or v3.19-rc1 and using R_UART,
be sure to use ttyS5 as the new console, due to the commit:

    f77d55a3b56a serial: 8250_dw: get index of serial line from DT aliases


Cheers
ChenYu

> Changes:
> -"sun6i: s/SUNXI_*P2WI*/SUN6I_*P2WI*/"
>  -Not only change the prefix of the P2WI gpio mux defines from SUNXI to
>   SUN6I, but also the prefix of the SUN6I_P2WI_BASE address define
> -"sunxi: Add support for the rsb (Reduced Serial Bus)"
>  -Drop sun6i / sun8i comments from SUN6I_P2WI_BASE / SUNXI_RSB_BASE defines,
>   use the prefix instead to make clear for which SoC family they are valid
> -"sun8i: Add dram initialization support"
>  -white space fixes
>  -Add a comment that the ddr phy bits look a lot like the ddr phy found
>   in the TI Keystone2 and add a link to the TI Keystone2 documentation for
>   future reference / cleanup work
>  -Split out the Ippo_q8h_v5_defconfig patches into their own patch
>
> Regards,
>
> Hans
>
> p.s.
>
> I also still need an ack for "sunxi: Fill memory before comparing it when
> doing dram init on sun6i", as you had some questions on that when reviewing
> v1 of the set.
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