[U-Boot] [PATCH 0/10] Add support for caching Memory Reference Code data

[Simon Glass]

Since the memory reference code is so slow on x86, add a feature to bypass
this, storing the previous parameters in SPI flash. This saves around 500ms
on each boot.

Also enable a SPI flash environment.


Simon Glass (10):
  x86: dts: Add compatible string for Intel ICH9 SPI controller
  x86: Add checksum implementation
  x86: Add helpers to read/write CMOS RAM
  x86: spi: Add device tree support
  Allow architecture-specific memory reservation
  x86: dts: Add SPI flash MRC details for chromebook_link
  x86: Implement a cache for Memory Reference Code parameters
  x86: config: Enable hook for saving MRC configuration
  x86: ivybridge: Drop the Kconfig MRC cache information
  x86: config: chromebook_link: Enable environment

 arch/x86/cpu/Makefile                          |   1 +
 arch/x86/cpu/ip_checksum.c                     |  61 ++++++
 arch/x86/cpu/ivybridge/Kconfig                 |  28 ---
 arch/x86/cpu/ivybridge/Makefile                |   1 +
 arch/x86/cpu/ivybridge/mrccache.c              | 156 ++++++++++++++
 arch/x86/cpu/ivybridge/sdram.c                 | 277 +++++++++++++++++++++++++
 arch/x86/dts/link.dts                          |  15 +-
 arch/x86/include/asm/arch-ivybridge/mrccache.h |  51 +++++
 arch/x86/include/asm/cmos.h                    | 181 ++++++++++++++++
 arch/x86/include/asm/global_data.h             |   3 +
 arch/x86/include/asm/ip_checksum.h             |  16 ++
 common/board_f.c                               |   7 +
 drivers/spi/ich.c                              |   7 +
 include/configs/chromebook_link.h              |   6 +
 include/configs/x86-common.h                   |   1 +
 include/fdtdec.h                               |   1 +
 lib/fdtdec.c                                   |   1 +
 17 files changed, 784 insertions(+), 29 deletions(-)
 create mode 100644 arch/x86/cpu/ip_checksum.c
 create mode 100644 arch/x86/cpu/ivybridge/mrccache.c
 create mode 100644 arch/x86/include/asm/arch-ivybridge/mrccache.h
 create mode 100644 arch/x86/include/asm/cmos.h
 create mode 100644 arch/x86/include/asm/ip_checksum.h

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2.2.0.rc0.207.ga3a616c