[U-Boot] [PATCH 15/22] x86: ivybridge: Set up an MTRR for the video frame buffer

[Bin Meng]

Hi Simon,

On Sun, Dec 28, 2014 at 10:20 AM, Simon Glass <sjg at chromium.org> wrote:
> Set the frame buffer to write-combining. This makes it faster, although for
> scrolling write-through is even faster for U-Boot.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
>  arch/x86/cpu/ivybridge/gma.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/arch/x86/cpu/ivybridge/gma.c b/arch/x86/cpu/ivybridge/gma.c
> index 125021b..03b2ebd 100644
> --- a/arch/x86/cpu/ivybridge/gma.c
> +++ b/arch/x86/cpu/ivybridge/gma.c
> @@ -12,6 +12,7 @@
>  #include <fdtdec.h>
>  #include <pci_rom.h>
>  #include <asm/io.h>
> +#include <asm/mtrr.h>
>  #include <asm/pci.h>
>  #include <asm/arch/pch.h>
>  #include <asm/arch/sandybridge.h>
> @@ -738,6 +739,8 @@ int gma_func0_init(pci_dev_t dev, struct pci_controller *hose,
>                    const void *blob, int node)
>  {
>         void *gtt_bar;
> +       ulong start;
> +       ulong base;
>         u32 reg32;
>         int ret;
>
> @@ -746,6 +749,11 @@ int gma_func0_init(pci_dev_t dev, struct pci_controller *hose,
>         reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
>         pci_write_config32(dev, PCI_COMMAND, reg32);
>
> +       /* Use write-combining for the graphics memory, 256MB */
> +       base = pci_read_bar32(hose, dev, 2);
> +       mtrr_add_request(MTRR_TYPE_WRCOMB, base, 256 << 20);

To make the codes more generic, should we decode the memory size via
bar instead of hardcoded 256MB?

> +       mtrr_commit(true);
> +
>         gtt_bar = (void *)pci_read_bar32(pci_bus_to_hose(0), dev, 0);
>         debug("GT bar %p\n", gtt_bar);
>         ret = gma_pm_init_pre_vbios(gtt_bar);
> --

Regards,
Bin