[U-Boot] [PATCH 05/12] sunxi: Add sun4i support

[Hans de Goede]

Hi,

On 05/31/2014 06:46 PM, Ian Campbell wrote:
> On Fri, 2014-05-30 at 11:06 +0200, Hans de Goede wrote:
>> Add support for the Allwinner A10 SoC also know as the Allwinner sun4i family.
>
> "known".
>
> Could you enumerate the main differences vs the existing sun7i stuff.
> e.g.:
>     - dram init and timing (hpcr?) values
>     - CCM_AHB_GATE_DLL
>     - ...
>

Fixed / done.

>> Signed-off-by: Henrik Nordstrom <henrik at henriknordstrom.net>
>> Signed-off-by: Stefan Roese <sr at denx.de>
>> Signed-off-by: Oliver Schinagl <oliver at schinagl.nl>
>> Signed-off-by: Hans de Goede <hdegoede at redhat.com>
>> ---
>>   arch/arm/cpu/armv7/sunxi/Makefile   |  2 +
>>   arch/arm/cpu/armv7/sunxi/cpu_info.c |  7 ++++
>>   arch/arm/cpu/armv7/sunxi/dram.c     | 81 +++++++++++++++++++++++++++++++++++--
>>   board/sunxi/Makefile                |  1 +
>>   board/sunxi/dram_cubieboard.c       | 31 ++++++++++++++
>>   boards.cfg                          |  1 +
>
> Please mention that you are enabling cb with this patch in the commit
> message.

Done.

>
>>   static void mctl_set_drive(void)
>>   {
>>   	struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
>>
>> +#ifdef CONFIG_SUN7I
>>   	clrsetbits_le32(&dram->mcr, DRAM_MCR_MODE_NORM(0x3) | (0x3 << 28),
>> +#else
>> +	clrsetbits_le32(&dram->mcr, DRAM_MCR_MODE_NORM(0x3),
>> +#endif
>
> This could be written as an ifdef around the "0x3<< 28 |" only (moved to
> its own line). Is that a better way though?

I believe that that only will make the code harder to read, so lets keep this
as is.

>> @@ -490,6 +549,22 @@ unsigned long dramc_init(struct dram_para *para)
>>
>>   	mctl_enable_dllx(para->tpr3);
>>
>> +#ifdef CONFIG_SUN4I
>> +	/* set odt impendance divide ratio */
>
> "impedance"

Fixed.

Thanks for the review.

Regards,

Hans