[U-Boot] [PATCH 5/5] ahci: provide sunxi SATA driver using AHCI platform framework
Ian Campbell
ijc at hellion.org.uk
Wed Jun 4 10:37:28 CEST 2014
On Tue, 2014-06-03 at 21:49 +0200, Hans de Goede wrote:
> Hi Ian,
>
> On 05/31/2014 06:36 PM, Ian Campbell wrote:
> > This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
> > for sun7i only since I don't have access to any other sunxi platformsw
> > with sata included.
> >
> > The PHY setup is derived from the Alwinner releases and Linux, but is mostly
> > undocumented.
> >
> > The Allwinner AHCI controller also requires some magic (and, again,
> > undocumented) DMA initialisation when starting a port. This is added under a
> > suitable ifdef.
> >
> > This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on
> > contents of Linux DTS files, including SATA power pin config taken from the
> > DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only.
> >
> > Signed-off-by: Ian Campbell <ijc at hellion.org.uk>
>
> Patches 1-4 of this set look ok and are:
>
> Acked-by: Hans de Goede <hdegoede at redhat.com>
Thanks.
> > diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
> > index 5a7da3c..ecbdb01 100644
> > --- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
> > +++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
> > @@ -36,10 +36,13 @@ void clock_init_safe(void)
> > CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
> > &ccm->cpu_ahb_apb0_cfg);
> > #ifdef CONFIG_SUN7I
> > - writel(0x1 << AHB_GATE_OFFSET_DMA | readl(&ccm->ahb_gate0),
> > - &ccm->ahb_gate0);
> > + setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA);
> > #endif
> > writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
>
> Please split out the above change in a separate patch.
Certainly. I'll rebase onto your v2 series and repost ASAP.
Ian.
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