[U-Boot] [Patch v2 6/7] TQMa6: add I2C support
Markus Niebel
list-09_u-boot at tqsc.de
Mon Jun 16 18:51:25 CEST 2014
From: Markus Niebel <Markus.Niebel at tqs.de>
This patch adds support for the I2C busses and devices
on the TQMa6 modules and MBa6 baseboards. Support for the PMIC
will be added later on.
Signed-off-by: Markus Niebel <Markus.Niebel at tq-group.com>
---
board/tqc/tqma6/tqma6.c | 27 +++++++++++++++++++++++++++
board/tqc/tqma6/tqma6_mba6.c | 35 ++++++++++++++++++++++++++++-------
include/configs/tqma6.h | 27 +++++++++++++++++++++++++++
3 files changed, 82 insertions(+), 7 deletions(-)
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index 7c737d1..556a70d 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -16,9 +16,11 @@
#include <asm/errno.h>
#include <asm/gpio.h>
#include <asm/io.h>
+#include <asm/imx-common/mxc_i2c.h>
#include <common.h>
#include <fsl_esdhc.h>
#include <libfdt.h>
+#include <i2c.h>
#include <mmc.h>
#include "tqma6_bb.h"
@@ -40,6 +42,10 @@ DECLARE_GLOBAL_DATA_PTR;
#define SPI_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
+ PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
int dram_init(void)
{
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
@@ -143,6 +149,26 @@ static void tqma6_iomuxc_spi(void)
ARRAY_SIZE(tqma6_ecspi1_pads));
}
+static struct i2c_pads_info tqma6_i2c3_pads = {
+ /* I2C3: on board LM75, M24C64, */
+ .scl = {
+ .i2c_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_5__I2C3_SCL, I2C_PAD_CTRL),
+ .gpio_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_5__GPIO1_IO05, I2C_PAD_CTRL),
+ .gp = IMX_GPIO_NR(1, 5)
+ },
+ .sda = {
+ .i2c_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_6__I2C3_SDA, I2C_PAD_CTRL),
+ .gpio_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_6__GPIO1_IO06, I2C_PAD_CTRL),
+ .gp = IMX_GPIO_NR(1, 6)
+ }
+};
+
+static void tqma6_setup_i2c(void)
+{
+ /* use logical index for bus, e.g. I2C1 -> 0 */
+ setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &tqma6_i2c3_pads);
+}
+
int board_early_init_f(void)
{
return tqma6_bb_board_early_init_f();
@@ -154,6 +180,7 @@ int board_init(void)
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
tqma6_iomuxc_spi();
+ tqma6_setup_i2c();
tqma6_bb_board_init();
diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c
index 4082e05..276ffe5 100644
--- a/board/tqc/tqma6/tqma6_mba6.c
+++ b/board/tqc/tqma6/tqma6_mba6.c
@@ -16,11 +16,13 @@
#include <asm/arch/sys_proto.h>
#include <asm/errno.h>
#include <asm/gpio.h>
+#include <asm/imx-common/mxc_i2c.h>
#include <common.h>
#include <fsl_esdhc.h>
#include <libfdt.h>
#include <malloc.h>
+#include <i2c.h>
#include <micrel.h>
#include <miiphy.h>
#include <mmc.h>
@@ -48,6 +50,10 @@ DECLARE_GLOBAL_DATA_PTR;
#define SPI_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
+ PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
#if defined(CONFIG_MX6Q)
#define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII 0x02e0790
@@ -203,6 +209,27 @@ int tqma6_bb_board_mmc_init(bd_t *bis)
return 0;
}
+static struct i2c_pads_info mba6_i2c1_pads = {
+/* I2C1: MBa6x */
+ .scl = {
+ .i2c_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL),
+ .gpio_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT9__GPIO5_IO27, I2C_PAD_CTRL),
+ .gp = IMX_GPIO_NR(5, 27)
+ },
+ .sda = {
+ .i2c_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL),
+ .gpio_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT8__GPIO5_IO26, I2C_PAD_CTRL),
+ .gp = IMX_GPIO_NR(5, 26)
+ }
+};
+
+static void mba6_setup_i2c(void)
+{
+ /* use logical index for bus, e.g. I2C1 -> 0 */
+ setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mba6_i2c1_pads);
+}
+
+
static iomux_v3_cfg_t const mba6_ecspi1_pads[] = {
NEW_PAD_CTRL(MX6_PAD_EIM_D24__GPIO3_IO24, SPI_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_EIM_D25__GPIO3_IO25, SPI_PAD_CTRL),
@@ -293,13 +320,6 @@ int board_eth_init(bd_t *bis)
return 0;
}
-#ifdef CONFIG_USB_EHCI_MX6
-int board_ehci_hcd_init(int port)
-{
- return 0;
-}
-#endif
-
int tqma6_bb_board_early_init_f(void)
{
mba6_setup_iomuxc_uart();
@@ -309,6 +329,7 @@ int tqma6_bb_board_early_init_f(void)
int tqma6_bb_board_init(void)
{
+ mba6_setup_i2c();
mba6_setup_iomuxc_spi();
/* do it here - to have reset completed */
mba6_setup_iomuxc_enet();
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 115f45a..df7395d 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -61,6 +61,33 @@
#define CONFIG_SF_DEFAULT_SPEED 50000000
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_I2C_MULTI_BUS
+/* #define CONFIG_I2C_MXC */
+#define CONFIG_SYS_I2C_SPEED 100000
+
+/* I2C SYSMON (LM75) */
+#define CONFIG_DTT_LM75
+#if defined(CONFIG_MBA6)
+#define CONFIG_DTT_SENSORS { 0, 1 }
+#else
+#define CONFIG_DTT_SENSORS { 0 }
+#endif
+#define CONFIG_DTT_MAX_TEMP 70
+#define CONFIG_DTT_MIN_TEMP -30
+#define CONFIG_DTT_HYSTERESIS 3
+#define CONFIG_CMD_DTT
+
+/* I2C EEPROM (M24C64) */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
+#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS 5 /* 32 Bytes */
+#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS 20
+#define CONFIG_CMD_EEPROM
+
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
--
1.7.9.5
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