[U-Boot] [PATCH v2 2/2] usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

Michael Trimarchi michael at amarulasolutions.com
Tue Jun 24 16:38:58 CEST 2014


Hi

Add USB custodian

Il 24/giu/2014 00:18 "Felipe Balbi" <balbi at ti.com> ha scritto:
>
> Newer AM437x silicon requires us to explicitly power up
> the USB2 PHY. By implementing usb_phy_power() we can
> achieve that.
>
> Signed-off-by: Felipe Balbi <balbi at ti.com>
> ---
>
> Changes since v1:
>         - add macros for USB1_CTRL register and bits
>
>  arch/arm/include/asm/arch-am33xx/hardware_am43xx.h |  5 +++++
>  drivers/usb/phy/omap_usb_phy.c                     | 17 ++++++++++++++++-
>  2 files changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
> index 15399dc..b5875e3 100644
> --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
> +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
> @@ -40,6 +40,11 @@
>  #define VTP0_CTRL_ADDR                 0x44E10E0C
>  #define VTP1_CTRL_ADDR                 0x48140E10
>
> +/* USB CTRL Base Address */
> +#define USB1_CTRL                      0x44e10628
> +#define USB1_CTRL_CM_PWRDN             BIT(0)
> +#define USB1_CTRL_OTG_PWRDN            BIT(1)
> +
>  /* DDR Base address */
>  #define DDR_PHY_CMD_ADDR               0x44E12000
>  #define DDR_PHY_DATA_ADDR              0x44E120C8
> diff --git a/drivers/usb/phy/omap_usb_phy.c
b/drivers/usb/phy/omap_usb_phy.c
> index af46db2..f78d532 100644
> --- a/drivers/usb/phy/omap_usb_phy.c
> +++ b/drivers/usb/phy/omap_usb_phy.c
> @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci
*omap)
>
>  void usb_phy_power(int on)
>  {
> -       return;
> +       u32 val;
> +
> +       /* USB1_CTRL */
> +       val = readl(USB1_CTRL);
> +       if (on) {
> +               /*
> +                * these bits are re-used on AM437x to power up/down the
USB
> +                * CM and OTG PHYs, if we don't toggle them, USB will not
be
> +                * functional on newer silicon revisions
> +                */
> +               val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN);
> +       } else {
> +               val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN;
> +       }
> +
> +       writel(val, USB1_CTRL);
>  }
>  #endif /* CONFIG_AM437X_USB2PHY2_HOST */

Michael

>
> --
> 2.0.0.390.gcb682f8
>


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