[U-Boot] [U-Boot,10/10] ARM: AM43xx: Change DDR3 Reset Value
Tom Rini
trini at ti.com
Tue Mar 4 20:14:33 CET 2014
On Tue, Feb 18, 2014 at 07:32:01AM -0500, Tom Rini wrote:
> From: Dave Gerlach <d-gerlach at ti.com>
>
> The bit DDR3_RST_DEF_VAL inside CTRL_DDR_IO represents the default value
> of the ddr reset value for DDR3 before the EMIF takes over. We must have
> this bit set high so that on exit from DeepSleep0 within the kernel the
> reset line has the proper value.
>
> Signed-off-by: Dave Gerlach <d-gerlach at ti.com>
Applied to u-boot-ti/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20140304/e1bbdcfe/attachment.pgp>
More information about the U-Boot
mailing list