[U-Boot] [PATCH 2/3] arm: exynos: pinmux: Add sdmmc4 gpio configuration
Jaehoon Chung
jh80.chung at samsung.com
Thu Mar 6 08:07:17 CET 2014
On 03/06/2014 03:58 PM, Minkyu Kang wrote:
> On 05/03/14 10:57, Beomho Seo wrote:
>> For use dwmmc controller, add SDMMC4 gpio configuration.
>>
>> Signed-off-by: Beomho Seo <beomho.seo at samsung.com>
>> Signed-off-by: Jaehoon Chung <jh80.chung at samsung.com>
>> Cc: Minkyu Kang <mk7.kang at samsung.com>
>> ---
>> arch/arm/cpu/armv7/exynos/pinmux.c | 20 +++++++++++++++-----
>> 1 file changed, 15 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
>> index 645c497..a67664f 100644
>> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
>> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
>> @@ -623,16 +623,25 @@ static int exynos4_mmc_config(int peripheral, int flags)
>> struct exynos4_gpio_part2 *gpio2 =
>> (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
>> struct s5p_gpio_bank *bank, *bank_ext;
>> + unsigned int func, func_ext = 0;
>
> please do not set initial value.
> please set value explicitly at switch..case statement instead.
>
>> int i;
>>
>> switch (peripheral) {
>> case PERIPH_ID_SDMMC0:
>> bank = &gpio2->k0;
>> bank_ext = &gpio2->k1;
>> + func = GPIO_FUNC(0x2);
>> + func_ext = GPIO_FUNC(0x3);
>> break;
>> case PERIPH_ID_SDMMC2:
>> bank = &gpio2->k2;
>> - bank_ext = &gpio2->k3;
>> + func = GPIO_FUNC(0x2);
>> + break;
>> + case PERIPH_ID_SDMMC4:
>> + bank = &gpio2->k0;
>> + bank_ext = &gpio2->k1;
>> + func = GPIO_FUNC(0x3);
>> + func_ext = GPIO_FUNC(0x4);
>> break;
>> default:
>> return -1;
>> @@ -640,13 +649,14 @@ static int exynos4_mmc_config(int peripheral, int flags)
>> for (i = 0; i < 7; i++) {
>> if (i == 2)
>> continue;
>> - s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
>> + s5p_gpio_cfg_pin(bank, i, func);
>> s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
>> s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
>> }
>> - if (flags & PINMUX_FLAG_8BIT_MODE) {
>> + if ((flags & PINMUX_FLAG_8BIT_MODE) &&
>> + ~(peripheral & PERIPH_ID_SDMMC2)) {
>
> Actually, I can't catch easily what you expected here.
> So.. could you please modify more readable?
I think that this point didn't need to change.
SDMMC2 didn't use 8bit mode at exynos4/5.
Best Regards,
Jaehoon Chung
>
>> for (i = 3; i < 7; i++) {
>> - s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
>> + s5p_gpio_cfg_pin(bank_ext, i, func_ext);
>> s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
>> s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
>> }
>> @@ -710,10 +720,10 @@ static int exynos4_pinmux_config(int peripheral, int flags)
>> break;
>> case PERIPH_ID_SDMMC0:
>> case PERIPH_ID_SDMMC2:
>> + case PERIPH_ID_SDMMC4:
>> return exynos4_mmc_config(peripheral, flags);
>> case PERIPH_ID_SDMMC1:
>> case PERIPH_ID_SDMMC3:
>> - case PERIPH_ID_SDMMC4:
>> debug("SDMMC device %d not implemented\n", peripheral);
>> return -1;
>> default:
>>
>
> Thanks,
> Minkyu Kang.
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