[U-Boot] [PATCH 1/3] board: samsung: trats2: Add DW MMC controller initialization

[Beomho Seo]

Thank you for your reply.

On 03/06/2014 03:58 PM, Minkyu Kang wrote:
> On 05/03/14 10:57, Beomho Seo wrote:
>> Add DW MMC controller initialization.
>> Selectively use DW MMC controller instead of SDHCI controller.
>>
>> Signed-off-by: Beomho Seo <beomho.seo at samsung.com>
>> Signed-off-by: Jaehoon Chung <jh80.chung at samsung.com>
>> Cc: Minkyu Kang <mk7.kang at samsung.com>
>> ---
>>  board/samsung/trats2/trats2.c |   31 +++++++++++++++++++++----------
>>  1 file changed, 21 insertions(+), 10 deletions(-)
>>
>> diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
>> index c17c24d..11bebb9 100644
>> --- a/board/samsung/trats2/trats2.c
>> +++ b/board/samsung/trats2/trats2.c
>> @@ -11,6 +11,7 @@
>>  #include <asm/io.h>
>>  #include <asm/arch/gpio.h>
>>  #include <asm/arch/mmc.h>
>> +#include <asm/arch/dwmmc.h>
>>  #include <asm/arch/power.h>
>>  #include <asm/arch/clk.h>
>>  #include <asm/arch/clock.h>
>> @@ -280,18 +281,19 @@ int board_mmc_init(bd_t *bis)
>>
>>  	gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
>>
>> -	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
>> +	/* eMMC_EN: SD_0_CDn or SD_4_CDn: GPK0[2] Output High */
>>  	s5p_gpio_direction_output(&gpio2->k0, 2, 1);
>>  	s5p_gpio_set_pull(&gpio2->k0, 2, GPIO_PULL_NONE);
>>
>>  	/*
>>  	 * eMMC GPIO:
>>  	 * SDR 8-bit at 48MHz at MMC0
>> -	 * GPK0[0]      SD_0_CLK(2)
>> -	 * GPK0[1]      SD_0_CMD(2)
>> -	 * GPK0[2]      SD_0_CDn        -> Not used
>> -	 * GPK0[3:6]    SD_0_DATA[0:3](2)
>> -	 * GPK1[3:6]    SD_0_DATA[0:3](3)
>> +	 *		SDHCI			DW-MMC
>> +	 * GPK0[0]      SD_0_CLK(2)		SD_4_CLK(3)
>> +	 * GPK0[1]      SD_0_CMD(2)		SD_4_CMD(3)
>> +	 * GPK0[2]      SD_0_CDn		SD_4_CDn	-> Not used
>> +	 * GPK0[3:6]    SD_0_DATA[0:3](2)	SD_4_DATA[0:3](3)
>> +	 * GPK1[3:6]    SD_0_DATA[4:7](3)	SD_4_DATA[4:7](4)
>>  	 *
>>  	 * DDR 4-bit at 26MHz at MMC4
>>  	 * GPK0[0]      SD_4_CLK(3)
>> @@ -301,17 +303,26 @@ int board_mmc_init(bd_t *bis)
>>  	 * GPK1[3:6]    SD_4_DATA[4:7](4)
>>  	 */
>>
>> -	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
>> -
>>  	/*
>>  	 * MMC device init
>> -	 * mmc0  : eMMC (8-bit buswidth)
>> -	 * mmc2  : SD card (4-bit buswidth)
>> +	 * mmc0  : eMMC, sdhci controller (8-bit buswidth)
>> +	 * mmc2  : SD card, sdhci controller (4-bit buswidth)
>> +	 * mmc4  : eMMC, dw-mmc controller (8-bit buswidth)
>>  	 */
>> +
>> +#ifndef CONFIG_DWMMC
>> +	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
>>  	if (err0)
>>  		debug("SDMMC0 not configured\n");
>>  	else
>>  		err0 = s5p_mmc_init(0, 8);
>> +#else
>> +	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC4, PINMUX_FLAG_8BIT_MODE);
>> +	if (err0)
>> +		debug("SDMMC4 not configured\n");
>> +	else
>> +		err0 = exynos_dwmci_add_port(4, 0x12550000, 8, 0x00010000);
> 
> what means 0x12550000, 0x00010000?
> 

Firstly, 0x12550000 is base address for mobile storage host(SDMMC4).
0x00010000 is value for set on CLKSEL register.
I will revise more readable.

>> +#endif
>>
>>  	/* T-flash detect */
>>  	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
>>
> 
> Thanks,
> Minkyu Kang.
> 


-- 
Best Regards,
Beomho Seo