[U-Boot] [PATCH v1 1/9] sunxi: initial sun7i clocks and timer support.

[Tom Rini]

On Fri, Mar 14, 2014 at 10:33:43AM +0000, Ian Campbell wrote:

[snip]
> +	writel(0xa1005000, &ccm->pll1_cfg);
> +	sdelay(200);
> +	writel(AXI_DIV_1 << 0 | AHB_DIV_2 << 4 | APB0_DIV_1 << 8 |
> +	       CPU_CLK_SRC_PLL1 << 16, &ccm->cpu_ahb_apb0_cfg);
> +	writel(0x1 << 6 | readl(&ccm->ahb_gate0), &ccm->ahb_gate0);
> +	writel(0x1 << 31 | readl(&ccm->pll6_cfg), &ccm->pll6_cfg);

All magic bits and shifts need defining.

> +/*
> + * This function is derived from PowerPC code (timebase clock frequency).
> + * On ARM it returns the number of timer ticks per second.
> + */
> +ulong get_tbclk(void)
> +{
> +	ulong tbclk;
> +	tbclk = CONFIG_SYS_HZ;
> +	return tbclk;
> +}

So, just return CONFIG_SYS_HZ ?

-- 
Tom
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