[U-Boot] [PATCH u-boot sunxi 06/12] sunxi: Add sun5i support
Hans de Goede
hdegoede at redhat.com
Tue Mar 18 00:00:50 CET 2014
Based linux-sunxi#sunxi commit d854c4de2f57 "arm: Handle .gnu.hash section in
ldscripts" vs v2014.01.
As well as the following signed-off-by the sunxi branch shows commits to
the sun5i dram bits by:
Berg Xing <bergxing at allwinnertech.com>
Tom Cubie <tangliang at allwinnertech.com>
Signed-off-by: Henrik Nordstrom <henrik at henriknordstrom.net>
Signed-off-by: Stefan Roese <sr at denx.de>
Signed-off-by: Oliver Schinagl <oliver at schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede at redhat.com>
---
arch/arm/cpu/armv7/sunxi/board.c | 12 ++++++++++++
arch/arm/cpu/armv7/sunxi/clock.c | 5 +++++
arch/arm/cpu/armv7/sunxi/cpu_info.c | 3 +++
arch/arm/cpu/armv7/sunxi/dram.c | 15 +++++++++++++++
arch/arm/include/asm/arch-sunxi/clock.h | 7 +++++++
board/sunxi/Makefile | 1 +
board/sunxi/dram_a10s_olinuxino_m.c | 31 +++++++++++++++++++++++++++++++
boards.cfg | 1 +
include/configs/sun5i.h | 23 +++++++++++++++++++++++
include/configs/sunxi-common.h | 2 ++
10 files changed, 100 insertions(+)
create mode 100644 board/sunxi/dram_a10s_olinuxino_m.c
create mode 100644 include/configs/sun5i.h
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 07f8c12..72eed16 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -45,9 +45,21 @@ u32 spl_boot_mode(void)
int gpio_init(void)
{
+#if CONFIG_CONS_INDEX == 1 && (defined(CONFIG_SUN4I) || defined(CONFIG_SUN7I))
sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX);
sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX);
sunxi_gpio_set_pull(SUNXI_GPB(23), 1);
+#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN5I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB19_UART0_TX);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB20_UART0_RX);
+ sunxi_gpio_set_pull(SUNXI_GPB(20), 1);
+#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_SUN5I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART1_TX);
+ sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART1_RX);
+ sunxi_gpio_set_pull(SUNXI_GPG(4), 1);
+#else
+#error Unsupported console port number. Please fix pin mux settings in board.c
+#endif
return 0;
}
diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
index dd01be6..22c89b8 100644
--- a/arch/arm/cpu/armv7/sunxi/clock.c
+++ b/arch/arm/cpu/armv7/sunxi/clock.c
@@ -33,6 +33,11 @@ static void clock_init_safe(void)
APB0_DIV_1 << APB0_DIV_SHIFT |
CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
&ccm->cpu_ahb_apb0_cfg);
+#ifdef CONFIG_SUN5I
+ /* Power on reset default for PLL6 is 2400 MHz, which is faster then
+ * it can reliable do :| Set it to a 600 MHz instead. */
+ writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
+#endif
#ifdef CONFIG_SUN7I
writel(0x1 << AHB_GATE_OFFSET_DMA | readl(&ccm->ahb_gate0),
&ccm->ahb_gate0);
diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c b/arch/arm/cpu/armv7/sunxi/cpu_info.c
index b4b5089..a388a53 100644
--- a/arch/arm/cpu/armv7/sunxi/cpu_info.c
+++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c
@@ -15,6 +15,9 @@ int print_cpuinfo(void)
{
#ifdef CONFIG_SUN4I
puts("CPU: Allwinner A10 (SUN4I)\n");
+#elif defined CONFIG_SUN5I
+ /* TODO: Distinguish A13/A10s */
+ puts("CPU: Allwinner A13/A10s (SUN5I)\n");
#elif defined CONFIG_SUN7I
puts("CPU: Allwinner A20 (SUN7I)\n");
#else
diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c
index 37edede..781f9b5 100644
--- a/arch/arm/cpu/armv7/sunxi/dram.c
+++ b/arch/arm/cpu/armv7/sunxi/dram.c
@@ -139,6 +139,16 @@ static void mctl_enable_dllx(u32 phase)
}
static u32 hpcr_value[32] = {
+#ifdef CONFIG_SUN5I
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0x1031, 0x1031, 0x0735, 0x1035,
+ 0x1035, 0x0731, 0x1031, 0,
+ 0x0301, 0x0301, 0x0301, 0x0301,
+ 0x0301, 0x0301, 0x0301, 0
+#endif
#ifdef CONFIG_SUN4I
0x0301, 0x0301, 0x0301, 0x0301,
0x0301, 0x0301, 0, 0,
@@ -446,6 +456,11 @@ unsigned long dramc_init(struct dram_para *para)
/* setup DRAM relative clock */
mctl_setup_dram_clock(para->clock);
+#ifdef CONFIG_SUN5I
+ /* Disable any pad power save control */
+ writel(0, &dram->ppwrsctl);
+#endif
+
/* reset external DRAM */
#ifndef CONFIG_SUN7I
mctl_ddr3_reset();
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h b/arch/arm/include/asm/arch-sunxi/clock.h
index 77a9b91..b889c11 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -119,8 +119,15 @@ struct sunxi_ccm_reg {
#define PLL1_CFG_DEFAULT 0xa1005000
+#ifdef CONFIG_SUN5I
+#define PLL6_CFG_DEFAULT 0x21009911
+#endif
#define PLL6_ENABLE_OFFSET 31
+#ifdef CONFIG_SUN5I
+#define AHB_CLK_SRC_AXI 0
+#endif
+
#define CLK_GATE_OPEN 0x1
#define CLK_GATE_CLOSE 0x0
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index 590ca42..8e284d4 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -10,4 +10,5 @@
#
obj-y += board.o
obj-$(CONFIG_A10_OLINUXINO_L) += dram_a10_olinuxino_l.o
+obj-$(CONFIG_A10S_OLINUXINO_M) += dram_a10s_olinuxino_m.o
obj-$(CONFIG_CUBIETRUCK) += dram_cubietruck.o
diff --git a/board/sunxi/dram_a10s_olinuxino_m.c b/board/sunxi/dram_a10s_olinuxino_m.c
new file mode 100644
index 0000000..8900539
--- /dev/null
+++ b/board/sunxi/dram_a10s_olinuxino_m.c
@@ -0,0 +1,31 @@
+/* this file is generated, don't edit it yourself */
+
+#include <common.h>
+#include <asm/arch/dram.h>
+
+static struct dram_para dram_para = {
+ .clock = 432,
+ .type = 3,
+ .rank_num = 1,
+ .density = 4096,
+ .io_width = 16,
+ .bus_width = 16,
+ .cas = 9,
+ .zq = 123,
+ .odt_en = 0,
+ .size = 512,
+ .tpr0 = 0x42d899b7,
+ .tpr1 = 0xa090,
+ .tpr2 = 0x22a00,
+ .tpr3 = 0,
+ .tpr4 = 0,
+ .tpr5 = 0,
+ .emr1 = 0x4,
+ .emr2 = 0x10,
+ .emr3 = 0,
+};
+
+unsigned long sunxi_dram_init(void)
+{
+ return dramc_init(&dram_para);
+}
diff --git a/boards.cfg b/boards.cfg
index 07dd65a..bae0797 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -354,6 +354,7 @@ Active arm armv7 s5pc1xx samsung goni
Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang <mk7.kang at samsung.com>
Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - -
Active arm armv7 sunxi - sunxi A10-OLinuXino-Lime sun4i:A10_OLINUXINO_L,SPL -
+Active arm armv7 sunxi - sunxi A10s-OLinuXino-M sun5i:A10S_OLINUXINO_M,SPL -
Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL -
Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL -
Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier <mathieu.poirier at linaro.org>
diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h
new file mode 100644
index 0000000..43f0d67
--- /dev/null
+++ b/include/configs/sun5i.h
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2012-2013 Henrik Nordstrom <henrik at henriknordstrom.net>
+ *
+ * Configuration settings for the Allwinner A13 (sun5i) CPU
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_SUN5I /* sun5i SoC generation */
+
+#define CONFIG_SYS_PROMPT "sun5i# "
+
+/*
+ * Include common sunxi configuration where most the settings are
+ */
+#include <configs/sunxi-common.h>
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 2bfea55..fe41b89 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -176,7 +176,9 @@
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
+#ifndef CONFIG_CONS_INDEX
#define CONFIG_CONS_INDEX 1 /* UART0 */
+#endif
#if !defined CONFIG_ENV_IS_IN_MMC && \
!defined CONFIG_ENV_IS_IN_NAND && \
--
1.9.0
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