[U-Boot] [PATCH] fpga: zynqpl: Fixed bug in alignment routine

[S Durga Prasad Paladugu]

Hi Eli,


On Sun, Mar 16, 2014 at 2:10 AM, Eli Billauer <eli.billauer at gmail.com>wrote:

> The aligned buffer is always with a higher address, so copying should run
> from the end of the buffer to the beginning, and not the other way around.
>
> Signed-off-by: Eli Billauer <eli.billauer at gmail.com>
> ---
>  drivers/fpga/zynqpl.c |    5 +++--
>  1 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
> index 160abc7..2888131 100644
> --- a/drivers/fpga/zynqpl.c
> +++ b/drivers/fpga/zynqpl.c
> @@ -173,7 +173,8 @@ int zynq_load(Xilinx_desc *desc, const void *buf,
> size_t bsize)
>  {
>         unsigned long ts; /* Timestamp */
>         u32 partialbit = 0;
> -       u32 i, control, isr_status, status, swap, diff;
> +       u32 control, isr_status, status, swap, diff;
> +       int i;
>         u32 *buf_start;
>
>         /* Detect if we are going working with partial or full bitstream */
> @@ -206,7 +207,7 @@ int zynq_load(Xilinx_desc *desc, const void *buf,
> size_t bsize)
>                 printf("%s: Align buffer at %x to %x(swap %d)\n", __func__,
>                        (u32)buf_start, (u32)new_buf, swap);
>
> -               for (i = 0; i < (bsize/4); i++)
> +               for (i = (bsize/4)-1; i >= 0 ; i--)
>                         new_buf[i] = load_word(&buf_start[i], swap);
>
This looks like not correct because if you look at the code above this, it
always ensuring that the new aligned buffer start is in front of the actual
buffer. That is for example if actual buff start is at 0x6C, then it
provides new buf aligned at 0x00 and copying word by word from 0x6C to 0x00.

 But here if you do copy word by word from the end, it will end up in
corrupting the actual data.(For example if our buff len is some 0x100 the
you are trying to copy from 0x16c to 0x100 which will corrupt the actual
data at 0x100).


Regards,

DP

>
>                 swap = SWAP_DONE;
> --
> 1.7.2.3
>
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