[U-Boot] iMX6 IPU display interface definition

[Andreas Geisreiter]

Hi,

we are working at the moment with i.MX6DL. I tried to setup new display support (RGB interface) in Bootloader U-Boot. There is a structure available, where I can define all the display timings:
	.mode	= {
		.name           = "wvga-rgb",
		.refresh        = 57,
		.xres           = 800,
		.yres           = 480,
		.pixclock       = 33260,
		.left_margin    = 42,
		.right_margin   = 86,
		.upper_margin   = 10,
		.lower_margin   = 33,
		.hsync_len      = 128,
		.vsync_len      = 2,
		.sync           = 0,
		.vmode          = FB_VMODE_NONINTERLACED

But there I miss the edge definition of the pixel clock and data enable. I also searched in the user manual about the i.MX6 IPU register where I can set the active high or low information but I can't find it.
So can anybody tell me in which registers I can set the following information's:
V-Sync: Active high or low
H-Sync: Active high or low
Pixel Clock: Data is driven on falling or rising edge
Output enable: Active high or low
Data lines: inverted or not

If anybody can tell me how I can do this in U-Boot it would also help. H-Sync and V-Sync activity I can control with the defines FB_SYNC_HOR_HIGH_ACT and FB_SYNC_VERT_HIGH_ACT but the other controls (pixel clock rising or falling edge, data enable active high or low, Data lines inverted or not) I'm missing.

Best regards,

Andreas Geisreiter
Product Manager DHCOM

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