[U-Boot] [PATCH v6 0/17] arm: ls102xa: Add Freescale LS102xA SoC and LS1021AQDS/TWR board support

[Alison Wang]

This series contain the support for Freescale LS102xA SoC and LS1021AQDS/TWR board.

The QorIQ LS1 family is built on Layerscape architecture, the industry's first
software-aware, core-agnostic networking architecture to offer unprecedented
efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7 cores that have been
optimized for high reliability and pack the highest level of integration available
for sub-3 W embedded communications processors with Layerscape architecture and
with a comprehensive enablement model focused on ease of programmability.

For the detail information about LS1021AQDS/TWR board, please refer to README in the patch.

Change in v6:
        - Fix checkpatch warnings.
	- Use #define instead of magic numbers.
	- Remove redundant codes.
	- Give more detail commits.
	- Move OCRAM_BASE_ADDR and OCRAM_SIZE to soc config.
	- Change NS16550 fdt node's name according the update in kernel.
	- Split ESDHC patch into two parts.

Changes in v5:
        - Remove private MDIO read/write functions. Handling the board
	  muxing between the RGMII/SGMII phys in eth.c.
	- Add detailed commit messages for I2C patch.
	- Adjust the video patches' order.
	- Remove LETECH patch, as it is used internally, maybe send out later.