[U-Boot] [Uboot 2012.10] AMCC's Riviera (PowerPC) linking .bss section at 0x10?

DangNhat PhamHuu phamhuudangnhat at gmail.com
Thu Sep 11 08:09:06 CEST 2014


Hi,
I know uboot 2012 is quite old but I’m quite confused here.

I’m trying to move the code for n4310 board (which similar to riviera) from
uboot 2009 to uboot 2012.10. The linker script for uboot-ocm for n4310 was
copied from riviera’s one. In riviera ocm linker script, I noticed that
.bss is intended to placed at 0x10 which cause my code hang when it try to
access some uninitialized global variables in .bss section before
initializing RAM as uboot can only access the last 4KB of 32-bit address
(0xffff f000 - 0xffff ffff) before RAM has been initialized.

In uboot 2009 ocm linker script, .bss section was placed right after .data
section (both in this 4KB) (you can see the diff at the end of this mail)

Now, I can fix this problem by moving .bss section in this linker script up
before some assignment which will move location counter to 0x10, and place
.bss right after .data section .Then,my code can run without any problems
but I still want to know does uboot intend to move .bss section to 0x10?
Could anyone please explain this for me or show me where I can find this
information (I have searched through mailing list for a while but couldn’t
find any clues).
Thank you very much.

Best regards,

Here is the diff for this section in uboot-ocm.lds

git diff uboot/board/amcc/riviera/u-boot-ocm.lds
uboot_2012.10/board/amcc/riviera/u-boot-ocm.lds
************************
   _edata  =  .;
   PROVIDE (edata = .);
@@ -118,7 +85,6 @@ SECTIONS
   .u_boot_cmd : { *(.u_boot_cmd) }
   __u_boot_cmd_end = .;
-
   . = .;
   __start___ex_table = .;
   __ex_table : { *(__ex_table) }
@@ -131,15 +97,52 @@ SECTIONS
   . = ALIGN(256);
   __init_end = .;
+#ifdef CONFIG_440+  .bootpg RESET_VECTOR_ADDRESS - 0xffc :+  {+
arch/powerpc/cpu/ppc4xx/start.o    (.bootpg)++    /*+     * PPC440
board need a board specific object with the+     * TLB definitions.
This needs to get included right after+     * start.o, since the first
shadow TLB only covers 4k+     * of address space.+     */+#ifdef
CONFIG_INIT_TLB+    CONFIG_INIT_TLB (.bootpg)+#else+
CONFIG_BOARDDIR/init.o     (.bootpg)+#endif+  } :text =
0xffff+#endif++  .resetvec RESET_VECTOR_ADDRESS :+  {+
KEEP(*(.resetvec))+  } :text = 0xffff++  . = RESET_VECTOR_ADDRESS +
0x4;+
++  /*+   * Make sure that the bss segment isn't linked at 0x0,
otherwise its+   * address won't be updated during relocation fixups.
Note that+   * this is a temporary fix.  Code to dynamically the fixup
the bss+   * location will be added in the future.  When the bss
relocation+   * fixup code is present this workaround should be
removed.+   */+#if (RESET_VECTOR_ADDRESS == 0xfffffffc)+  . |=
0x10;+#endif+
   __bss_start = .;-  .bss       :+  .bss (NOLOAD)       :
   {-   *(.sbss) *(.scommon)-   *(.dynbss)-   *(.bss)+   *(.bss*)+   *(.sbss*)
    *(COMMON)-   . = ALIGN(4);-  }-  _end = . ;+  } :bss++  . =
ALIGN(4);+  __bss_end__ = . ;
   PROVIDE (end = .);
 }

/**

   - @Name: Phạm Hữu Đăng Nhật
   - @StudentID: 51002279
   - @Class: MT10KTTN
   - Ho Chi Minh University of Technology
   - @Mobile: 0164.968.2716
   */

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