[PATCH] versatileqemu ual build

[Jeroen Hofstee]

~~~
 arch/arm/cpu/arm926ejs/cache.c | 2 +~
 arch/arm/cpu/arm926ejs/start.S | 2 +~
 arch/arm/lib/cache.c           | 2 +~
 include/configs/versatile.h    | 2 ++
 4 files changed, 5 insertions(+), 3 deletions(~)

diff ~~git a/arch/arm/cpu/arm926ejs/cache.c
b/arch/arm/cpu/arm926ejs/cache.c
index e86c2ed..b1aae13 100644
~~~ a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ ~22,7 +22,7 @@ void flush_dcache_all(void)
 {
    asm volatile(
        "0:"
~       "mrc p15, 0, r15, c7, c14, 3\n"
+       "mrc p15, 0, apsr_nzcv, c7, c14, 3\n"
        "bne 0b\n"
        "mcr p15, 0, %0, c7, c10, 4\n"
         : : "r"(0) : "memory"
diff ~~git a/arch/arm/cpu/arm926ejs/start.S
b/arch/arm/cpu/arm926ejs/start.S
index 8eb2494..b9d2ae2 100644
~~~ a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ ~78,7 +78,7 @@ cpu_init_crit:
     */
    mov r0, #0
 flush_dcache:
~   mrc p15, 0, r15, c7, c10, 3
+   mrc p15, 0, apsr_nzcv, c7, c10, 3
    bne flush_dcache
 
    mcr p15, 0, r0, c8, c7, 0   /* invalidate TLB */
diff ~~git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 4e597a4..d12ea2b 100644
~~~ a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ ~25,7 +25,7 @@ __weak void flush_cache(unsigned long start, unsigned
long size)
 
 #ifdef CONFIG_ARM926EJS
    /* test and clean, page 2~23 of arm926ejs manual */
~   asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
+   asm("0: mrc p15, 0, apsr_nzcv, c7, c10, 3\n\t" "bne 0b\n" : : :
"memory");
    /* disable write buffer as well (page 2~22) */
    asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
 #endif /* CONFIG_ARM926EJS */
diff ~~git a/include/configs/versatile.h b/include/configs/versatile.h
index 29c32fe..52d2af3 100644
~~~ a/include/configs/versatile.h
+++ b/include/configs/versatile.h
@@ ~23,6 +23,8 @@
 #define CONFIG_VERSATILE   1   /* in Versatile Platform Board  */
 #define CONFIG_ARCH_VERSATILE  1   /* Specifically, a Versatile    */
 
+#define CONFIG_SYS_GENERIC_BOARD
+
 #define CONFIG_SYS_MEMTEST_START   0x100000
 #define CONFIG_SYS_MEMTEST_END     0x10000000
 
~~ 
2.1.0