[U-Boot] [PATCH 00/35][RFC] arm: socfpga: Usability fixes

[Chin Liang See]

Hi Marek,

On Wed, 2014-09-17 at 14:39 +0200, marex at denx.de wrote:
> On Wednesday, September 17, 2014 at 02:00:42 PM, Chin Liang See wrote:
> > On Wed, 2014-09-17 at 13:52 +0200, marex at denx.de wrote:
> > > On Wednesday, September 17, 2014 at 01:29:15 PM, Chin Liang See wrote:
> > > > 3. MMC is not enabled in SocFPGA.
> > > > I recall there is a patch from Pavel.
> > > > I believe its pending for v2 due to some comments.
> > > 
> > > This should be in the tree in fact. Is CONFIG_CMD_MMC defined ?
> > 
> > I didn't see any MMC configuration at include/configs/socfpga_cyclone5
> > at mainline nor the new patch series. Wonder I might miss out any ACKed
> > patch?
> 
> Oh I see. I have this enabled in the repository here, but I didn't submit that 
> change since it needs more work. The code is there , added in the patch
> 
> arm: socfpga: misc: Add SD controller init
> 
> The change for the SoCFPGA config file is missing though.

Yup, I just submit the patch to add that "socfpga: Enable DWMMC for
SOCFPGA". With this added, the SDMMC is working well at U-Boot. This
including all the 35 patches from you. Something to cheer during the
weekend :)

Here is the printout:

SOCFPGA_CYCLONE5 # fatls mmc 0:1
   194168   u-boot.img
    16289   socfpga.dtb
  3202824   zimage

3 file(s), 0 dir(s)

SOCFPGA_CYCLONE5 # mmc read 8000 0 1

MMC read: dev # 0, block # 0, count 1 ... 1 blocks read: OK
SOCFPGA_CYCLONE5 # md 8000
00008000: 00000000 00000000 00000000 00000000    ................
00008010: 00000000 00000000 00000000 00000000    ................
00008020: 00000000 00000000 00000000 00000000    ................
00008030: 00000000 00000000 00000000 00000000    ................
00008040: 00000000 00000000 00000000 00000000    ................
00008050: 00000000 00000000 00000000 00000000    ................
00008060: 00000000 00000000 00000000 00000000    ................
00008070: 00000000 00000000 00000000 00000000    ................
00008080: 00000000 00000000 00000000 00000000    ................
00008090: 00000000 00000000 00000000 00000000    ................
000080a0: 00000000 00000000 00000000 00000000    ................
000080b0: 00000000 00000000 00000000 00000000    ................
000080c0: 00000000 00000000 00000000 00000000    ................
000080d0: 00000000 00000000 00000000 00000000    ................
000080e0: 00000000 00000000 00000000 00000000    ................
000080f0: 00000000 00000000 00000000 00000000    ................
SOCFPGA_CYCLONE5 #
00008100: 00000000 00000000 00000000 00000000    ................
00008110: 00000000 00000000 00000000 00000000    ................
00008120: 00000000 00000000 00000000 00000000    ................
00008130: 00000000 00000000 00000000 00000000    ................
00008140: 00000000 00000000 00000000 00000000    ................
00008150: 00000000 00000000 00000000 00000000    ................
00008160: 00000000 00000000 00000000 00000000    ................
00008170: 00000000 00000000 00000000 00000000    ................
00008180: 00000000 00000000 00000000 00000000    ................
00008190: 00000000 00000000 00000000 00000000    ................
000081a0: 00000000 00000000 00000000 00000000    ................
000081b0: 00000000 00000000 479bf7be 01000000    ...........G....
000081c0: 3c0b0001 003e093e 937e0000 00000000    ...<>.>...~.....
000081d0: 3c830a01 93bc133e 93bc0000 00000000    ...<>...........
000081e0: 3ca21401 27781d3e 93bc0001 00000000    ...<>.x'........
000081f0: 00000000 00000000 00000000 aa550000    ..............U.
SOCFPGA_CYCLONE5 #

Thanks
Chin Liang

> 
> Best regards,
> Marek Vasut