[U-Boot] [PATCH] arm: ls102xa: Fixed a register definition error

[Yuantian Tang]

OK, if you say so.

Thanks,
Yuantian

> -----Original Message-----
> From: Albert ARIBAUD [mailto:albert.u.boot at aribaud.net]
> Sent: Friday, September 19, 2014 11:59 PM
> To: Tang Yuantian-B29983
> Cc: Wang Huan-B18965; Lu Jingchang-B35083; Jin Zhengxiong-R64188;
> Kushwaha Prabhakar-B32579; u-boot at lists.denx.de
> Subject: Re: [PATCH] arm: ls102xa: Fixed a register definition error
> 
> Hi Yuantian,
> 
> On Fri, 19 Sep 2014 01:45:52 +0000, Yuantian Tang
> <Yuantian.Tang at freescale.com> wrote:
> 
> >
> > > -----Original Message-----
> > > From: Albert ARIBAUD [mailto:albert.u.boot at aribaud.net]
> > > Sent: Thursday, September 18, 2014 7:25 PM
> > > To: Tang Yuantian-B29983
> > > Cc: Wang Huan-B18965; Lu Jingchang-B35083; Jin Zhengxiong-R64188;
> > > Kushwaha Prabhakar-B32579; u-boot at lists.denx.de
> > > Subject: Re: [PATCH] arm: ls102xa: Fixed a register definition error
> > >
> > > Hi Tang,
> > >
> > > On Thu, 18 Sep 2014 17:12:06 +0800, Tang Yuantian
> > > <Yuantian.Tang at freescale.com> wrote:
> > >
> > > > There are 8 SCFG_SPARECR registers in SCFG memory block, not just one.
> > > >
> > > > Signed-off-by: Tang Yuantian <Yuantian.Tang at freescale.com>
> > > > ---
> > > >  arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +-
> > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> > > > b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> > > > index 7995fe2..b5db720 100644
> > > > --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> > > > +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
> > > > @@ -182,7 +182,7 @@ struct ccsr_scfg {
> > > >  	u32 etsecmcr;
> > > >  	u32 sdhciovserlcr;
> > > >  	u32 resv14[61];
> > > > -	u32 sparecr;
> > > > +	u32 sparecr[8];
> > > >  };
> > > >
> > > >  /* Clocking */
> > >
> > > Obviously the original code was not problematic as sparecr was not
> > > used. Is your change dictated by a patch or series that you are
> > > preparing and that will use sparecr?
> > >
> > Yes, they will be used by deep sleep patches I am preparing.
> 
> Then please post them inside the deep sleep patch series.
> 
> > Thanks,
> > Yuantian
> >
> > > Amicalement,
> 
> Amicalement,
> --
> Albert.