[U-Boot] [WIP PATCH 0/2 v2] arm: socfpga: Add Cadence QSPI support

[Stefan Roese]

Hi SoCFPGA-developers!

So this is my 2nd posting regarding the Candence SPI driver on SoCFPGA.
I got it working now. But only with one quick-hack, as you can see in
patch 4/4. Which disabled the dcache. Or more precise, doesn't enable it.
Thanks to Michael who pointed this out.

Since I really can't spend more time on this in this week, and
Chin Liang mentioned that he might be able to help out (thanks
again for this), I'm posting this version now for all others
as a reference. Hopefully Chin Liang (or some other volunteer) can fix
this cache issue in a generic way.

Thanks,
Stefan

Cc: Chin Liang See <clsee at altera.com>
Cc: Dinh Nguyen <dinguyen at altera.com>
Cc: Vince Bridgers <vbridger at altera.com>
Cc: Marek Vasut <marex at denx.de>
Cc: Pavel Machek <pavel at denx.de>
Cc: Michael Trimarchi <michael at amarulasolutions.com>