[U-Boot] [PATCH v3 01/29] sandbox: dts: Add a SPI device and cros_ec device

[Simon Glass]

Add a SPI device which can be used for testing SPI flash features in
sandbox.

Also add a cros_ec device since with driver model the Chrome OS EC
emulation will not otherwise be available.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

Changes in v3: None
Changes in v2:
- Adjust binding to avoid Linux-specific mentions

 arch/sandbox/dts/sandbox.dts                   | 26 ++++++++++++++++++++++++++
 doc/device-tree-bindings/mtd/spi/spi-flash.txt | 25 +++++++++++++++++++++++++
 2 files changed, 51 insertions(+)
 create mode 100644 doc/device-tree-bindings/mtd/spi/spi-flash.txt

diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 797478a..7614715 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -1,6 +1,9 @@
 /dts-v1/;
 
 / {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
 	chosen {
 		stdout-path = "/serial";
 	};
@@ -131,4 +134,27 @@
 		num-gpios = <20>;
 	};
 
+	spi at 0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		compatible = "sandbox,spi";
+		cs-gpios = <0>, <&gpio_a 0>;
+		flash at 0 {
+			reg = <0>;
+			compatible = "spansion,m25p16", "sandbox,spi-flash";
+			spi-max-frequency = <40000000>;
+			sandbox,filename = "spi.bin";
+		};
+	};
+
+	cros-ec at 0 {
+		compatible = "google,cros-ec";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		firmware_storage_spi: flash at 0 {
+			reg = <0 0x400000>;
+		};
+	};
+
 };
diff --git a/doc/device-tree-bindings/mtd/spi/spi-flash.txt b/doc/device-tree-bindings/mtd/spi/spi-flash.txt
new file mode 100644
index 0000000..85522d8
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/spi/spi-flash.txt
@@ -0,0 +1,25 @@
+* MTD SPI driver for serial flash chips
+
+Required properties:
+- #address-cells, #size-cells : Must be present if the device has sub-nodes
+  representing partitions.
+- compatible : Should be the manufacturer and the name of the chip. Bear in
+               mind that the DT binding is not U-Boot-only, but in case of
+               U-Boot, see spi_flash_params_table table in
+               drivers/mtd/spi/sf_params.c for the list of supported chips.
+- reg : Chip-Select number
+- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
+
+Optional properties:
+ - memory-map : Address and size of the flash, if memory mapped. This may
+                apply to Intel chipsets, which tend to memory-map flash.
+
+Example:
+
+	flash: m25p80 at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,m25p80";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+	};
-- 
2.1.0.rc2.206.gedb03e5