[U-Boot] [PATCH 1/2] mtd: vf610_nfc: mark page as dirty on block erase
Scott Wood
scottwood at freescale.com
Fri Apr 3 01:48:19 CEST 2015
On Tue, 2015-03-31 at 11:02 -0400, Bill Pringlemeir wrote:
> On 2015-03-31 00:15, Scott Wood wrote:
>
> > Especially since you'd be doing one write rather than four full-page
> > "partial" writes. Surely the bottleneck here is the NAND chip itself,
> > not copying data to the buffer?
>
> The AHB bus that the NFC controller is on is relatively slow. Here are
> some numbers from 'AN4947-vybrid-bus-architechure',
>
> Vybrid Cortex A5 to DDR (in CPU clocks 400/500MHz),
>
> First read Subsequent
> 285 8 all caches on
> 345 269 no cache, mmu
> 437 371 no cache, no mmu
>
> The NFC is on an AHB bus 32bit, 66MHz (not AXI 64bit, 133-166MHz like
> DDR). The AHB will be about four times slower. Also the reads and
> writes to the physical NAND must take place serially. Here are the
> program page steps.
>
> 1. Issue controller Read full page to NFC buffer.
> 2. Copy update partial page from DDR to NFC buffer.
> 3. Issue write NAND page.
Why is any sort of read part of the write process?
If this controller can't handle subpage writes properly, then disable
them.
-Scott
More information about the U-Boot
mailing list