[U-Boot] [PATCHv3 01/17] arm: socfpga: spl: Add main sdram code

[Marek Vasut]

On Friday, April 03, 2015 at 06:55:20 AM, Dinh Nguyen wrote:
> Hi Marek,

Hi Dinh,

> On Thu, Apr 2, 2015 at 9:00 PM, Marek Vasut <marex at denx.de> wrote:
> > On Tuesday, March 31, 2015 at 08:41:46 AM, Wolfgang Denk wrote:
> >> Dear dinguyen at opensource.altera.com,
> >> 
> >> In message
> >> <1427752878-18426-2-git-send-email-dinguyen at opensource.altera.com> you
> >> wrote:
> >> 
> >> ...
> >> 
> >> > +/* Register: sdr.ctrlgrp.ctrlcfg
> >> > 
> >> >   */ +#define SDR_CTRLGRP_CTRLCFG_ADDRESS 0x5000
> >> > 
> >> > +/* Register: sdr.ctrlgrp.dramtiming1
> >> > 
> >> >   */ +#define SDR_CTRLGRP_DRAMTIMING1_ADDRESS 0x5004
> >> > 
> >> > +/* Register: sdr.ctrlgrp.dramtiming2
> >> > 
> >> >   */ +#define SDR_CTRLGRP_DRAMTIMING2_ADDRESS 0x5008
> >> > 
> >> > +/* Register: sdr.ctrlgrp.dramtiming3
> >> > 
> >> >   */ +#define SDR_CTRLGRP_DRAMTIMING3_ADDRESS 0x500c
> >> > 
> >> > +/* Register: sdr.ctrlgrp.dramtiming4
> >> > 
> >> >   */ +#define SDR_CTRLGRP_DRAMTIMING4_ADDRESS 0x5010
> >> > 
> >> > +/* Register: sdr.ctrlgrp.lowpwrtiming
> >> > 
> >> >   */ +#define SDR_CTRLGRP_LOWPWRTIMING_ADDRESS 0x5014
> >> > 
> >> > +/* Register: sdr.ctrlgrp.dramodt
> >> > 
> >> >   */ +#define SDR_CTRLGRP_DRAMODT_ADDRESS 0x5018
> >> > 
> >> > +/* Register: sdr.ctrlgrp.dramaddrw
> >> > 
> >> >   */ +#define SDR_CTRLGRP_DRAMADDRW_ADDRESS 0x502c
> >> 
> >> ...
> >> 
> >> First, this whole block of registers should probably made a C struct.
> >> Also, the comments are pretty much redundant - they do not add any new
> >> information that is not already included in the #define, so they could
> >> be omitted to make the code easier to read.
> > 
> > Hi!
> > 
> > Sculpting this file into shape would be the most difficult part. I guess
> > Wolfgang already pointed out the largest issues. I also picked up most
> > of the series to make your life easier.
> > 
> > Is there any way I can help you with getting this patch in shape ?
> 
> Thanks for picking up the other patches for the SPL. That helps out
> ALOT! I can focus on getting the SDRAM driver in better shape. Give me
> a week or 2 for an updated patch.

Roger that, thank you! If I can help with anything, please let me know.

Best regards,
Marek Vasut