[U-Boot] [PATCH v2] ARM: mx6: Enable ARM errata workaround for 845369

[nitin.garg at freescale.com]

From: Nitin Garg <nitin.garg at freescale.com>

Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 845369. The ARM errata 751472, 794072, 761320,
845369 only applied to the following configuration:

This erratum affects configurations with either:
  - One processor if the ACP is present
  - Two or more processors

i.MX6 family does not have the ACP and thus only the MPCore
system will be impacted, which are the i.MX6DQ, i.MX6DL.

Signed-off-by: Nitin Garg <nitin.garg at freescale.com>

---

Changes in v2:
Apply 751472, 794072, 761320, 845369 to i.MX6DQ, i.MX6DL
only.

 include/configs/mx6_common.h |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index e0528ce..cc6b03e 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -18,9 +18,13 @@
 #define __MX6_COMMON_H
 
 #define CONFIG_ARM_ERRATA_743622
+#if (defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) ||\
+defined(CONFIG_MX6QDL)) && !defined(CONFIG_MX6S)
 #define CONFIG_ARM_ERRATA_751472
 #define CONFIG_ARM_ERRATA_794072
 #define CONFIG_ARM_ERRATA_761320
+#define CONFIG_ARM_ERRATA_845369
+#endif
 #define CONFIG_BOARD_POSTCLK_INIT
 
 #ifndef CONFIG_SYS_L2CACHE_OFF
-- 
1.7.9.5