[U-Boot] [PATCH 24/34] imx: ventana: updated 16bit DDR calibration
Tim Harvey
tharvey at gateworks.com
Wed Apr 8 21:54:54 CEST 2015
Updated 16bit DDR calibration using values obtained from running the
i.MX6 DDR Stress Test tool over a set of boards over full operationg
temperature.
Signed-off-by: Tim Harvey <tharvey at gateworks.com>
---
board/gateworks/gw_ventana/gw_ventana_spl.c | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 668e112..baa2c6e 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -233,13 +233,15 @@ static struct mx6_mmdc_calibration mx6dq_128x16_mmdc_calib = {
static struct mx6_mmdc_calibration mx6dq_256x16_mmdc_calib = {
/* write leveling calibration determine */
- .p0_mpwldectrl0 = 0x00190017,
+ .p0_mpwldectrl0 = 0x001B0016,
+ .p0_mpwldectrl1 = 0x000C000E,
/* Read DQS Gating calibration */
- .p0_mpdgctrl0 = 0x43380347,
+ .p0_mpdgctrl0 = 0x4324033A,
+ .p0_mpdgctrl1 = 0x00000000,
/* Read Calibration: DQS delay relative to DQ read access */
- .p0_mprddlctl = 0x3C313539,
+ .p0_mprddlctl = 0x40403438,
/* Write Calibration: DQ/DM delay relative to DQS write access */
- .p0_mpwrdlctl = 0x36393C39,
+ .p0_mpwrdlctl = 0x40403D36,
};
static struct mx6_mmdc_calibration mx6sdl_128x16_mmdc_calib = {
@@ -255,13 +257,15 @@ static struct mx6_mmdc_calibration mx6sdl_128x16_mmdc_calib = {
static struct mx6_mmdc_calibration mx6sdl_256x16_mmdc_calib = {
/* write leveling calibration determine */
- .p0_mpwldectrl0 = 0x00190017,
+ .p0_mpwldectrl0 = 0x00420043,
+ .p0_mpwldectrl1 = 0x0016001A,
/* Read DQS Gating calibration */
- .p0_mpdgctrl0 = 0x43380347,
+ .p0_mpdgctrl0 = 0x4238023B,
+ .p0_mpdgctrl1 = 0x00000000,
/* Read Calibration: DQS delay relative to DQ read access */
- .p0_mprddlctl = 0x3C313539,
+ .p0_mprddlctl = 0x40404849,
/* Write Calibration: DQ/DM delay relative to DQS write access */
- .p0_mpwrdlctl = 0x36393C39,
+ .p0_mpwrdlctl = 0x40402E2F,
};
static struct mx6_mmdc_calibration mx6dq_128x32_mmdc_calib = {
--
1.9.1
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