[U-Boot] [PATCH 1/2][v6] powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041

[aneesh.bansal at freescale.com]

We have understood what Scott was suggesting but still need to try the changes suggested by him.
We haven't started on it yet.

Regards,
Aneesh Bansal

> -----Original Message-----
> From: Sun York-R58495
> Sent: Monday, April 13, 2015 10:03 PM
> To: Bansal Aneesh-B39320; u-boot at lists.denx.de
> Cc: Wood Scott-B07421; Gupta Ruchika-R66431
> Subject: Re: [PATCH 1/2][v6] powerpc/mpc85xx: SECURE BOOT- NAND secure
> boot target for P3041
> 
> Aneesh,
> 
> On 03/04/2015 11:38 PM, Aneesh Bansal wrote:
> > Secure Boot Target is added for NAND for P3041.
> > Changes:
> > In PowerPC, the core begins execution from address 0xFFFFFFFC.
> > In case of secure boot, this default address maps to Boot ROM.
> > The Boot ROM code requires that the bootloader(U-boot) must lie in 0
> > to 3.5G address space i.e. 0x0 - 0xDFFFFFFF.
> >
> > In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is
> > configured as SRAM. U-Boot binary will be located on this SRAM at
> > location 0xBFF40000 with entry point as 0xBFFFFFFC.
> >
> > Signed-off-by: Ruchika Gupta <ruchika.gupta at freescale.com>
> > Signed-off-by: Aneesh Bansal <aneesh.bansal at freescale.com>
> > ---
> > Changes in v6:
> > Changed the version in Patchset.
> >
> 
> Are we closed on this patch discussion? I see open discussion for v4 patch after you
> posted v6.
> 
> York