[U-Boot] [PATCH] fsl/deepsleep: avoid the DDR restore from being optimized out

[Yuantian.Tang at freescale.com]

From: Tang Yuantian <Yuantian.Tang at freescale.com>

Function dp_ddr_restore is to restore the first 128-byte space
of DDR. However those codes may be optimized out by compiler
since the destination address is at 0x0. In order to avoid
compiler optimization, we restore the space from high address,
which is not at 0x0, to low address.

Signed-off-by: Tang Yuantian <Yuantian.Tang at freescale.com>
---
 board/freescale/common/mpc85xx_sleep.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/freescale/common/mpc85xx_sleep.c b/board/freescale/common/mpc85xx_sleep.c
index 9e4132c..e9cbd51 100644
--- a/board/freescale/common/mpc85xx_sleep.c
+++ b/board/freescale/common/mpc85xx_sleep.c
@@ -43,16 +43,16 @@ void fsl_dp_disable_console(void)
  */
 static void dp_ddr_restore(void)
 {
-	volatile u64 *src, *dst;
+	u64 *src, *dst;
 	int i;
 	struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
 
 	/* get the address of ddr date from SPARECR3 */
-	src = (u64 *)in_be32(&scfg->sparecr[2]);
-	dst = (u64 *)CONFIG_SYS_SDRAM_BASE;
+	src = (u64 *)(in_be32(&scfg->sparecr[2]) + DDR_BUFF_LEN - 8);
+	dst = (u64 *)(CONFIG_SYS_SDRAM_BASE + DDR_BUFF_LEN - 8);
 
 	for (i = 0; i < DDR_BUFF_LEN / 8; i++)
-		*dst++ = *src++;
+		*dst-- = *src--;
 
 	flush_dcache();
 }
-- 
2.1.0.27.g96db324