[U-Boot] [PATCH] mpc85xx/T1042D4RDB: Select DIU in cpld mux for T1042D4RDB

[Dongsheng Wang]

From: Wang Dongsheng <dongsheng.wang at freescale.com>

T1042D4RDB CPLD SFPCSR register defined has changed to 0:1 QE_MUX.
There have two bits to control DVI, DFP, PROFIBUS, TMD MUX select.
So we need to update a macro define value to switch to DIU channel.

Signed-off-by: Wang Dongsheng <dongsheng.wang at freescale.com>
---

This patch depends on T1042D4RDB platform code patches.
Priyanka Jain has send T1042D4RDB patches to upstrem, but I cannot
found them in U-boot patchworks. So just comments in this patch.

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index f4006ee..baccbb5 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -288,8 +288,11 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
 #define CPLD_LBMAP_DFLTBANK		0x40 /* BANK OR | BANK0 */
 #define CPLD_LBMAP_RESET		0xFF
 #define CPLD_LBMAP_SHIFT		0x03
-#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB)
+
+#if defined(CONFIG_T1042RDB_PI)
 #define CPLD_DIU_SEL_DFP		0x80
+#elif defined(CONFIG_T1042D4RDB)
+#define CPLD_DIU_SEL_DFP		0xc0
 #endif
 
 #define CONFIG_SYS_CPLD_BASE	0xffdf0000
@@ -458,7 +461,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
 #define CONFIG_SYS_HUSH_PARSER
 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 
-#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB)
+#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T1042D4RDB)
 /* Video */
 #define CONFIG_FSL_DIU_FB
 
-- 
2.1.0.27.g96db324