[U-Boot] powerpc: P2020 relocation breaks with ELDK 5.5

Tomas Hlavacek tmshlvck at gmail.com
Wed Apr 22 23:05:13 CEST 2015


Hello!

It seems that there might be some problem with relocation on P2020RDB-PC 
board when U-Boot is compiled with a relatively new toolchain. It is hard 
to detect because it seems that the relocation leaves only some constants 
on their old addresses but otherwise it works fine.

I have a Turris board which is a derivative of P2020RDB-PC (it differs only 
in minor aspects). I have a perfectly working U-Boot (current master) 
compiled with ELDK 5.2.1. But compiling the same tree with anything newer 
(ELDK 5.5+ or current OpenWRT buildroot) causes this

U-Boot 2015.04-00008-g2b3a8e8 (Apr 21 2015 - 06:18:55)

CPU0: P2020E, Version: 2.1, (0x80ea0021)
Core: e500, Version: 5.1, (0x80211051)
Clock Configuration:
CPU0:1200 MHz, CPU1:1200 MHz, 
CCB:600 MHz,
DDR:400 MHz (800 MT/s data rate) (Asynchronous), LBC:37.500 MHz
L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Board: P2020RDB-PCA CPLD: V4.1 PCBA: V4.0
Error reading i2c boot information!
I2C: ready
SPI: ready
DRAM: DDR: failed to read SPD from address 82
SPD error on controller 0! Trying fallback to raw timing calculation
Detected UDIMM Fixed DDR on board
1 GiB (DDR3, 64-bit, CL=6, ECC off)
Flash: 16 MiB
L2: 512 KiB enabled
NAND: 256 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment

PCIe1: Root Complex of mini PCIe SLOT, no link, regs @ 0xffe0a000
PCIe1: Bus 00 - 00
PCIe2: Root Complex of PCIe SLOT, no link, regs @ 0xffe09000
PCIe2: Bus 01 - 01
In: serial
Out: serial
Err: serial
Net: No address specified for VSC7385 microcode.
eTSEC1 [PRIME]
Error: eTSEC1 address not set.
, eTSEC2
Error: eTSEC2 address not set.
, eTSEC3
Error: eTSEC3 address not set.

Hit any key to stop autoboot: 0 
=> protect off 0xEFF00000 0xEFFFFFFF
Un-Protected 8 sectors
=> era 0xEFF00000 0xEFFFFFFF

........ done
Erased 8 sectors
Bad trap at PC: 3fef785c, SR: 29200, vector=d00
NIP: 3FEF785C XER: 00000000 LR: 3FF4C6C8 REGS: 3fdedc50 TRAP: 0d00 DAR: 
F0000000
MSR: 00029200 EE: 1 PR: 0 FP: 0 ME: 1 IR/DR: 00

GPR00: 000000FF 3FDEDD40 3FDEDF08 EFFA5C28 EFFFFFFF 3FDEDD98 3FF6D5D4 
00000000 
GPR08: 00000080 3FDEDDD8 00000000 EFFFFFFF 44002084 49858508 3FFB0224 
0000000A 
GPR16: 3FF55C40 3FF55C38 3FF55C30 0000000A 00000000 00000000 3FFB0220 
EFFA5C28 
GPR24: 00000000 00000002 00000000 00000000 3FDEDDD8 3FDEDD98 3FF689F4 
3FF6D5D4 
Call backtrace: 
3FDF3668 3FF12D4C 3FEFAAA0 3FEFB15C 3FF186F4 3FEFB8F0 3FF46C34 
3FEFBCAC 3FEF164C 
Exception in kernel pc 3fef785c signal 0

ERROR ### Please RESET the board

I looked into that and it seems that the exception occurs when hush calls 
getenv("IFS") (common/cli_hush.c:3133) in a subsequent strcat() because 
"IFS" is actually a pointer to already-erased flash (0xeff...).

I have to admit that I don't understand reloc code for this CPU so I am 
asking this question or requesting help since I was unable to fix it or 
find out what is wrong on my own yet.

Thanks,
Tomas


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