[U-Boot] unassigned-patches/140: [PATCH 2/4] x86: minnowmax: add GPIO banks in the device tree

[u-boot at bugs.denx.de]

There is 6 banks:
    4 banks for CORE: available in S0 mode
    2 banks for SUS (Suspend): available in S0-S5 mode

Signed-off-by: Gabriel Huau <contact at huau-gabriel.fr>

---
Added to GNATS database as unassigned-patches/140
>Responsible:    patch-coord
>Message-Id:     <1429805775-1809-3-git-send-email-contact at huau-gabriel.fr>
>In-Reply-To:    <1429805775-1809-1-git-send-email-contact at huau-gabriel.fr>
>References:     <1429805775-1809-1-git-send-email-contact at huau-gabriel.fr>
>Patch-Date:     Thu Apr 23 18:16:13 +0200 2015
---
 arch/x86/dts/minnowmax.dts | 42 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 8f34369..c73e421 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -21,6 +21,48 @@
 		silent_console = <0>;
 	};
 
+	gpioa {
+		compatible = "intel,ich6-gpio";
+		u-boot,dm-pre-reloc;
+		reg = <0 0x20>;
+		bank-name = "A";
+	};
+
+	gpiob {
+		compatible = "intel,ich6-gpio";
+		u-boot,dm-pre-reloc;
+		reg = <0x20 0x20>;
+		bank-name = "B";
+	};
+
+	gpioc {
+		compatible = "intel,ich6-gpio";
+		u-boot,dm-pre-reloc;
+		reg = <0x40 0x20>;
+		bank-name = "C";
+	};
+
+	gpiod {
+		compatible = "intel,ich6-gpio";
+		u-boot,dm-pre-reloc;
+		reg = <0x60 0x20>;
+		bank-name = "D";
+	};
+
+	gpioe {
+		compatible = "intel,ich6-gpio";
+		u-boot,dm-pre-reloc;
+		reg = <0x80 0x20>;
+		bank-name = "E";
+	};
+
+	gpiof {
+		compatible = "intel,ich6-gpio";
+		u-boot,dm-pre-reloc;
+		reg = <0xA0 0x20>;
+		bank-name = "F";
+	};
+
 	chosen {
 		stdout-path = "/serial";
 	};
-- 
2.1.4