[U-Boot] [PATCH 1/4] x86: baytrail: fix the GPIOBASE address

Simon Glass sjg at chromium.org
Fri Apr 24 05:25:13 CEST 2015


Hi Gabriel,

On 23 April 2015 at 19:40, Bin Meng <bmeng.cn at gmail.com> wrote:
> On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau <contact at huau-gabriel.fr> wrote:
>> Signed-off-by: Gabriel Huau <contact at huau-gabriel.fr>

Can you please add a commit message?

>> ---
>>  arch/x86/include/asm/arch-baytrail/gpio.h | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h b/arch/x86/include/asm/arch-baytrail/gpio.h
>> index ab4e059..4e8987c 100644
>> --- a/arch/x86/include/asm/arch-baytrail/gpio.h
>> +++ b/arch/x86/include/asm/arch-baytrail/gpio.h
>> @@ -8,6 +8,6 @@
>>  #define _X86_ARCH_GPIO_H_
>>
>>  /* Where in config space is the register that points to the GPIO registers? */
>> -#define PCI_CFG_GPIOBASE 0x44
>> +#define PCI_CFG_GPIOBASE 0x48
>>
>>  #endif /* _X86_ARCH_GPIO_H_ */
>> --
>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>

Regards,
Simon


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