[U-Boot] [PATCH 2/2] x86: crownbay: Update dts for SST SPI flash

Simon Glass sjg at chromium.org
Fri Apr 24 05:36:29 CEST 2015


On 23 April 2015 at 03:00, Bin Meng <bmeng.cn at gmail.com> wrote:
> Use SST SPI flash compatible string "spi-flash-sst" so that the
> write op is really working.
>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> ---
>
>  arch/x86/dts/crownbay.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Simon Glass <sjg at chromium.org>

>
> diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
> index fbdeade..a15d8ca 100644
> --- a/arch/x86/dts/crownbay.dts
> +++ b/arch/x86/dts/crownbay.dts
> @@ -53,7 +53,7 @@
>                 compatible = "intel,ich-spi";
>                 spi-flash at 0 {
>                         reg = <0>;
> -                       compatible = "sst,25vf016b", "spi-flash";
> +                       compatible = "sst,25vf016b", "spi-flash-sst";
>                         memory-map = <0xffe00000 0x00200000>;
>                 };
>         };
> --
> 1.8.2.1
>


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