[U-Boot] [RESEND PATCH v3 09/13] arm: mvebu: Change network init code to allow a more flexible setup

[Stefan Roese]

With the introduction of the Armada 38x support, its necessary to change
the mvneta ethernet driver init call from always 4 times to a
configurable value. Lets make this init call more flexible by moving
the actually used devices to the config header.

Additionally this patch takes care of the slightly different base
addresses for the ethernet controllers on A38x.

Signed-off-by: Stefan Roese <sr at denx.de>
Tested-by: Kevin Smith <kevin.smith at elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach at gdsys.cc>
---

Changes in v3: None
Changes in v2: None

 arch/arm/mach-mvebu/cpu.c                   | 20 ++++++++++++++++----
 board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c |  3 ++-
 include/configs/db-mv784mp-gp.h             |  2 +-
 include/configs/maxbcm.h                    |  2 +-
 4 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index eca5e21..8058fad 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -216,10 +216,22 @@ int arch_misc_init(void)
 #ifdef CONFIG_MVNETA
 int cpu_eth_init(bd_t *bis)
 {
-	mvneta_initialize(bis, MVEBU_EGIGA0_BASE, 0, CONFIG_PHY_BASE_ADDR + 0);
-	mvneta_initialize(bis, MVEBU_EGIGA1_BASE, 1, CONFIG_PHY_BASE_ADDR + 1);
-	mvneta_initialize(bis, MVEBU_EGIGA2_BASE, 2, CONFIG_PHY_BASE_ADDR + 2);
-	mvneta_initialize(bis, MVEBU_EGIGA3_BASE, 3, CONFIG_PHY_BASE_ADDR + 3);
+	u32 enet_base[] = { MVEBU_EGIGA0_BASE, MVEBU_EGIGA1_BASE,
+			    MVEBU_EGIGA2_BASE, MVEBU_EGIGA3_BASE };
+	u8 phy_addr[] = CONFIG_PHY_ADDR;
+	int i;
+
+	/*
+	 * Only Armada XP supports all 4 ethernet interfaces. A38x has
+	 * slightly different base addresses for its 2-3 interfaces.
+	 */
+	if (mvebu_soc_family() != MVEBU_SOC_AXP) {
+		enet_base[1] = MVEBU_EGIGA2_BASE;
+		enet_base[2] = MVEBU_EGIGA3_BASE;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(phy_addr); i++)
+		mvneta_initialize(bis, enet_base[i], i, phy_addr[i]);
 
 	return 0;
 }
diff --git a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
index b3dae89..00ca878 100644
--- a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
+++ b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
@@ -86,7 +86,8 @@ int checkboard(void)
 /* Configure and enable MV88E1545 PHY */
 void reset_phy(void)
 {
-	u16 devadr = CONFIG_PHY_BASE_ADDR;
+	u8 phy_addr[] = CONFIG_PHY_ADDR;
+	u16 devadr = phy_addr[0];
 	char *name = "neta0";
 	u16 reg;
 
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index 897f473..77d3408 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -53,7 +53,7 @@
 #define CONFIG_ENV_SECT_SIZE		(64 << 10) /* 64KiB sectors */
 
 #define CONFIG_PHY_MARVELL		/* there is a marvell phy */
-#define CONFIG_PHY_BASE_ADDR	0x10
+#define CONFIG_PHY_ADDR			{ 0x10, 0x11, 0x12, 0x13 }
 #define CONFIG_SYS_NETA_INTERFACE_TYPE	PHY_INTERFACE_MODE_QSGMII
 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
 #define CONFIG_RESET_PHY_R
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index a0ff067..d8811a4 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -53,7 +53,7 @@
 #define CONFIG_ENV_SECT_SIZE		(64 << 10) /* 64KiB sectors */
 
 #define CONFIG_PHY_MARVELL		/* there is a marvell phy */
-#define CONFIG_PHY_BASE_ADDR	0x0
+#define CONFIG_PHY_ADDR			{ 0x0, 0x1, 0x2, 0x3 }
 #define CONFIG_SYS_NETA_INTERFACE_TYPE	PHY_INTERFACE_MODE_SGMII
 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
 #define CONFIG_RESET_PHY_R
-- 
2.3.6