[U-Boot] [PATCH 1/4 v3] x86: baytrail: fix the GPIOBASE address

[Gabriel Huau]

The correct GPIOBASE address on the baytrail is 0x48

Signed-off-by: Gabriel Huau <contact at huau-gabriel.fr>
---
Changes for v2:
	- Add a commit message

Changes for v3:
	- Fix patch number

 arch/x86/include/asm/arch-baytrail/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h b/arch/x86/include/asm/arch-baytrail/gpio.h
index ab4e059..4e8987c 100644
--- a/arch/x86/include/asm/arch-baytrail/gpio.h
+++ b/arch/x86/include/asm/arch-baytrail/gpio.h
@@ -8,6 +8,6 @@
 #define _X86_ARCH_GPIO_H_
 
 /* Where in config space is the register that points to the GPIO registers? */
-#define PCI_CFG_GPIOBASE 0x44
+#define PCI_CFG_GPIOBASE 0x48
 
 #endif /* _X86_ARCH_GPIO_H_ */
-- 
2.1.4