[U-Boot] [U-Boot 1/7] dm: spi: zynq_spi: Convert to driver model

Jagan Teki jagannadh.teki at gmail.com
Mon Apr 27 17:00:56 CEST 2015


Hi Simon,

On 23 April 2015 at 23:53, Simon Glass <sjg at chromium.org> wrote:
> Hi Jagan,
>
> On 23 April 2015 at 08:15, Jagannadha Sutradharudu Teki
> <jagannadh.teki at gmail.com> wrote:
>> This converts the zynq spi driver to use the driver model.
>>
>> Minimal functional changes like using meaningful name on
>> structure members wrt mainlined dm spi drivers.
>> - input_hz -> frequency
>> - req_hz -> freq
>> - base -> regs
>>
>> Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki at gmail.com>
>> Cc: Simon Glass <sjg at chromium.org>
>> Cc: Michal Simek <michal.simek at xilinx.com>
>> Cc: Siva Durga Prasad Paladugu <sivadur at xilinx.com>
>> ---
>> Note: Siva Durga Prasad, can you test this on zc770_xm010
>>
>>  drivers/spi/zynq_spi.c | 305 +++++++++++++++++++++++++++++--------------------
>>  1 file changed, 181 insertions(+), 124 deletions(-)
>>
>
> Acked-by: Simon Glass <sjg at chromium.org>
>
>> diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
>> index ff1ec6a..62edbbe 100644
>> --- a/drivers/spi/zynq_spi.c
>> +++ b/drivers/spi/zynq_spi.c
>> @@ -1,5 +1,6 @@
>>  /*
>>   * (C) Copyright 2013 Inc.
>> + * (C) Copyright 2015 Jagannadha Sutradharudu Teki <jagannadh.teki at gmail.com>
>>   *
>>   * Xilinx Zynq PS SPI controller driver (master mode only)
>>   *
>> @@ -8,6 +9,8 @@
>>
>>  #include <config.h>
>>  #include <common.h>
>> +#include <dm.h>
>> +#include <errno.h>
>>  #include <malloc.h>
>>  #include <spi.h>
>>  #include <asm/io.h>
>> @@ -44,180 +47,142 @@ struct zynq_spi_regs {
>>         u32 rxdr;       /* 0x20 */
>>  };
>>
>> -/* zynq spi slave */
>> -struct zynq_spi_slave {
>> -       struct spi_slave slave;
>> -       struct zynq_spi_regs *base;
>> -       u8 mode;
>> -       u8 fifo_depth;
>> +
>> +/* zynq spi platform data */
>> +struct zynq_spi_platdata {
>> +       struct zynq_spi_regs *regs;
>> +       u32 frequency;          /* input frequency */
>>         u32 speed_hz;
>> -       u32 input_hz;
>> -       u32 req_hz;
>>  };
>>
>> -static inline struct zynq_spi_slave *to_zynq_spi_slave(struct spi_slave *slave)
>> -{
>> -       return container_of(slave, struct zynq_spi_slave, slave);
>> -}
>> +/* zynq spi priv */
>> +struct zynq_spi_priv {
>> +       struct zynq_spi_regs *regs;
>> +       u8 cs;
>> +       u8 mode;
>> +       u8 fifo_depth;
>> +       u32 freq;               /* required frequency */
>> +};
>>
>> -static inline struct zynq_spi_regs *get_zynq_spi_base(int dev)
>> +static inline struct zynq_spi_regs *get_zynq_spi_regs(struct udevice *bus)
>
> I see you remove this in a latest patch.

Yes, added dts node for retrieving reg.

>
>>  {
>> -       if (dev)
>> +       if (bus->seq)
>>                 return (struct zynq_spi_regs *)ZYNQ_SPI_BASEADDR1;
>>         else
>>                 return (struct zynq_spi_regs *)ZYNQ_SPI_BASEADDR0;
>>  }
>>
> [snip]

thanks!
-- 
Jagan.


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