[U-Boot] [PATCH 2/2] usb: gadget: add usb phy control to support fastboot for rk3036

[Frank Wang]

Used s3c usb otg device driver frame and added USB PHY handle function.

Signed-off-by: Frank Wang <frank.wang at rock-chips.com>
---
 board/evb_rk3036/evb_rk3036/evb_rk3036.c |   27 ++++++++++++++++++++++
 drivers/usb/gadget/Makefile              |    1 +
 drivers/usb/gadget/rk_udc_otg_phy.c      |   36 ++++++++++++++++++++++++++++++
 include/configs/rk3036_common.h          |   19 ++++++++++++++++
 4 files changed, 83 insertions(+)
 create mode 100644 drivers/usb/gadget/rk_udc_otg_phy.c

diff --git a/board/evb_rk3036/evb_rk3036/evb_rk3036.c b/board/evb_rk3036/evb_rk3036/evb_rk3036.c
index 52d45e5..16e1d1a 100644
--- a/board/evb_rk3036/evb_rk3036/evb_rk3036.c
+++ b/board/evb_rk3036/evb_rk3036/evb_rk3036.c
@@ -9,6 +9,11 @@
 #include <common.h>
 #include <dm.h>
 
+#ifdef CONFIG_USB_GADGET
+#include <usb.h>
+#include <usb/s3c_udc.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 void get_ddr_config(struct rk3036_ddr_config *config)
@@ -46,3 +51,25 @@ void enable_caches(void)
 	dcache_enable();
 }
 #endif
+
+#ifdef CONFIG_USB_GADGET
+#define RKIO_GRF_PHYS				0x20008000
+#define RKIO_USBOTG_BASE			0x10180000
+
+static struct s3c_plat_otg_data rk_otg_data = {
+	.regs_phy	= RKIO_GRF_PHYS,
+	.regs_otg	= RKIO_USBOTG_BASE
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	debug("%s: performing s3c_udc_probe\n", __func__);
+	return s3c_udc_probe(&rk_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	debug("%s\n", __func__);
+	return 0;
+}
+#endif
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 6288ecf..4374236 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -13,6 +13,7 @@ ifdef CONFIG_USB_GADGET
 obj-$(CONFIG_USB_GADGET_AT91) += at91_udc.o
 obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
 obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o
+obj-$(CONFIG_USB_GADGET_RK_UDC_OTG_PHY) += rk_udc_otg_phy.o
 obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
 obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o
 obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
diff --git a/drivers/usb/gadget/rk_udc_otg_phy.c b/drivers/usb/gadget/rk_udc_otg_phy.c
new file mode 100644
index 0000000..ddf4718
--- /dev/null
+++ b/drivers/usb/gadget/rk_udc_otg_phy.c
@@ -0,0 +1,36 @@
+/*
+ * Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+
+#include <usb/s3c_udc.h>
+
+/* UOC control */
+#define GRF_UOC0_CON5				0x017c
+#define GRF_UOC1_CON4				0x0190
+
+void otg_phy_init(struct s3c_udc *dev)
+{
+	/* Disable usb-uart bypass */
+	writel(0x34000000, (dev->pdata->regs_phy + GRF_UOC0_CON5));
+
+	/* Phy PLL recovering */
+	writel(0x00030001, (dev->pdata->regs_phy + GRF_UOC0_CON5));
+	mdelay(10);
+	writel(0x00030002, (dev->pdata->regs_phy + GRF_UOC0_CON5));
+	mdelay(500);
+}
+
+void otg_phy_off(struct s3c_udc *dev)
+{
+	/* usbphy0 bypass disable and otg enable */
+	writel(0x34000000, (dev->pdata->regs_phy + GRF_UOC0_CON5));
+
+	/* usb phy enter suspend */
+	writel(0x007f0055, (dev->pdata->regs_phy + GRF_UOC0_CON5));
+}
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 34c8f35..8344d6c 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -59,6 +59,25 @@
 #define CONFIG_PARTITION_UUIDS
 #define CONFIG_CMD_PART
 
+/* FASTBOOT */
+#define CONFIG_CMD_FASTBOOT
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_RK_UDC_OTG_PHY
+#define CONFIG_USB_FUNCTION_FASTBOOT
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_FASTBOOT_FLASH
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV		0
+#define CONFIG_FASTBOOT_BUF_ADDR		CONFIG_SYS_LOAD_ADDR
+#define CONFIG_FASTBOOT_BUF_SIZE		0x07000000
+#define CONFIG_USB_GADGET_VBUS_DRAW		0
+#define CONFIG_SYS_CACHELINE_SIZE		64
+#define CONFIG_G_DNL_MANUFACTURER		"Rockchip"
+#define CONFIG_G_DNL_VENDOR_NUM		0x2207
+#define CONFIG_G_DNL_PRODUCT_NUM		0x0006
+
 /* RAW SD card / eMMC locations. */
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	256
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(128 << 10)
-- 
1.7.9.5