[U-Boot] [PATCH] ARM: imx: fsl_esdhc: fix usage of low 4 bits of sysctl register
Eric Nelson
eric at nelint.com
Fri Dec 4 18:43:33 CET 2015
On 12/04/2015 10:38 AM, Eric Nelson wrote:
> On 12/04/2015 10:32 AM, Eric Nelson wrote:
>> The low four bits of the SYSCTL register are reserved on the USDHC
>> controller on i.MX6 and i.MX7 processors, but are used for clocking
>> operations on earlier models.
>>
>> Guard against their usage by hiding the bit mask macros on those
>> processors.
>>
>> These bits are used to prevent glitches when changing clocks on
>> i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7.
>>
>> From the i.MX6DQ RM:
>> To prevent possible glitch on the card clock, clear the
>> FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS
>> or DVS in System Control Register) or setting RSTA bit.
>>
>> Signed-off-by: Eric Nelson <eric at nelint.com>
>
> I forgot to add an in-reply-to header.
>
> http://lists.denx.de/pipermail/u-boot/2015-December/thread.html#236651
>
>
Fabio, I haven't been able to reproduce the "mmc erase/ENGcm03648"
issue (with or without a code change) for a couple of hours now.
Can you give this a spin?
It seems unlikely to address the issue unless what we're seeing is a
side effect of a glitch while switching clocks.
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