[U-Boot] [PATCH v2] mx6sxsabresd: Fix Ethernet PHY reset sequence
Stefano Babic
sbabic at denx.de
Mon Dec 7 14:49:51 CET 2015
On 04/12/2015 14:13, Fabio Estevam wrote:
> Hi Stefano,
>
> On Mon, Nov 23, 2015 at 4:18 PM, Fabio Estevam <festevam at gmail.com> wrote:
>> From: Fabio Estevam <fabio.estevam at freescale.com>
>>
>> Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is
>> registered") Ethernet is no longer functional.
>>
>> This commit does not have an issue in itself, but it revelead a problem
>> with the Ethernet initialization.
>>
>> Fix this by calling enable_fec_anatop_clock() earlier and also
>> by adding a 10ms reset delay as recommended in the AR8031 datasheet.
>>
>> Suggested-by: Jörg Krause <joerg.krause at embedded.rocks>
>> Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
>
> Any comments about this one?
>
> Regards,
>
> Fabio Estevam
>
Fine with me, and I have not seen any other comments. I am applying it.
Reviewed-by: Stefano Babic <sbabic at denx.de>
Best regards,
Stefano Babic
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