[U-Boot] [PATCH v4] armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
York Sun
yorksun at freescale.com
Mon Dec 7 19:08:17 CET 2015
MC and debug server are not board-specific. Instead of reserving
memory in each board file, a weak function is introduced in board_f.c
to replace macro CONFIG_SYS_MEM_TOP_HIDE for more flexibility.
Legacy use of this macro is still supported. Move the reservation
calculation to SoC file. Reduce debug server memory by 2MB to
make room for secure memory.
In the system with MC and debug server, the top of u-boot memory
is not the end of memory. PRAM is not used for this reservation.
Signed-off-by: York Sun <yorksun at freescale.com>
---
Changes in v4:
Rebase to current master branch
Changes in v3:
Rename CONFIG_SYS_MC_RESERV_MEM_ALIGN to CONFIG_SYS_MC_RSV_MEM_ALIGN
Check for unused CONFIG_SYS_MEM_TOP_HIDE if board_reserve_ram_top is used
Use gd->ram_size = board_reserve_ram_top(gd->ram_size) format
Use phys_size_t instead of ulong for ram_size calculation
Changes in v2:
Revise commit message.
README | 6 +++---
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 21 +++++++++++++++++++++
board/freescale/ls2080a/ls2080a.c | 17 -----------------
board/freescale/ls2080aqds/ls2080aqds.c | 17 -----------------
board/freescale/ls2080ardb/ls2080ardb.c | 17 -----------------
common/board_f.c | 23 +++++++++++++++--------
include/configs/ls2080a_common.h | 9 ++-------
7 files changed, 41 insertions(+), 69 deletions(-)
diff --git a/README b/README
index 6ea1af2..43f307f 100644
--- a/README
+++ b/README
@@ -3877,7 +3877,7 @@ Configuration Settings:
the RAM base is not zero, or RAM is divided into banks,
this variable needs to be recalcuated to get the address.
-- CONFIG_SYS_MEM_TOP_HIDE (PPC only):
+- CONFIG_SYS_MEM_TOP_HIDE:
If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
this specified memory area will get subtracted from the top
(end) of RAM and won't get "touched" at all by U-Boot. By
@@ -5056,8 +5056,8 @@ This firmware often needs to be loaded during U-Boot booting.
- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE
Define minimum DDR size required for debug server image
-- CONFIG_SYS_MEM_TOP_HIDE_MIN
- Define minimum DDR size to be hided from top of the DDR memory
+- CONFIG_SYS_MC_RSV_MEM_ALIGN
+ Define alignment of reserved memory MC requires
Reproducible builds
-------------------
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 87ccaf1..6ea28ed 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -636,3 +636,24 @@ void reset_cpu(ulong addr)
val |= 0x02;
scfg_out32(rstcr, val);
}
+
+phys_size_t board_reserve_ram_top(phys_size_t ram_size)
+{
+ phys_size_t ram_top = ram_size;
+
+#ifdef CONFIG_SYS_MEM_TOP_HIDE
+#error CONFIG_SYS_MEM_TOP_HIDE not to be used together with this function
+#endif
+/* Carve the Debug Server private DRAM block from the end of DRAM */
+#ifdef CONFIG_FSL_DEBUG_SERVER
+ ram_top -= debug_server_get_dram_block_size();
+#endif
+
+/* Carve the MC private DRAM block from the end of DRAM */
+#ifdef CONFIG_FSL_MC_ENET
+ ram_top -= mc_get_dram_block_size();
+ ram_top &= ~(CONFIG_SYS_MC_RSV_MEM_ALIGN - 1);
+#endif
+
+ return ram_top;
+}
diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c
index 827fbf0..7bce8b0 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -68,23 +68,6 @@ int arch_misc_init(void)
}
#endif
-unsigned long get_dram_size_to_hide(void)
-{
- unsigned long dram_to_hide = 0;
-
-/* Carve the Debug Server private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_DEBUG_SERVER
- dram_to_hide += debug_server_get_dram_block_size();
-#endif
-
-/* Carve the MC private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_MC_ENET
- dram_to_hide += mc_get_dram_block_size();
-#endif
-
- return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
-}
-
int board_eth_init(bd_t *bis)
{
int error = 0;
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 1f99072..aa256a2 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -253,23 +253,6 @@ int arch_misc_init(void)
}
#endif
-unsigned long get_dram_size_to_hide(void)
-{
- unsigned long dram_to_hide = 0;
-
-/* Carve the Debug Server private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_DEBUG_SERVER
- dram_to_hide += debug_server_get_dram_block_size();
-#endif
-
-/* Carve the MC private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_MC_ENET
- dram_to_hide += mc_get_dram_block_size();
-#endif
-
- return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
-}
-
#ifdef CONFIG_FSL_MC_ENET
void fdt_fixup_board_enet(void *fdt)
{
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 2ae9d6c..c63b639 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -219,23 +219,6 @@ int arch_misc_init(void)
}
#endif
-unsigned long get_dram_size_to_hide(void)
-{
- unsigned long dram_to_hide = 0;
-
-/* Carve the Debug Server private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_DEBUG_SERVER
- dram_to_hide += debug_server_get_dram_block_size();
-#endif
-
-/* Carve the MC private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_MC_ENET
- dram_to_hide += mc_get_dram_block_size();
-#endif
-
- return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
-}
-
#ifdef CONFIG_FSL_MC_ENET
void fdt_fixup_board_enet(void *fdt)
{
diff --git a/common/board_f.c b/common/board_f.c
index e13657f..51d8814 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -317,6 +317,15 @@ __weak ulong board_get_usable_ram_top(ulong total_size)
return gd->ram_top;
}
+__weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)
+{
+#ifdef CONFIG_SYS_MEM_TOP_HIDE
+ return ram_size - CONFIG_SYS_MEM_TOP_HIDE;
+#else
+ return ram_size;
+#endif
+}
+
static int setup_dest_addr(void)
{
debug("Monitor len: %08lX\n", gd->mon_len);
@@ -333,19 +342,17 @@ static int setup_dest_addr(void)
*/
gd->secure_ram = gd->ram_size;
#endif
-#if defined(CONFIG_SYS_MEM_TOP_HIDE)
/*
* Subtract specified amount of memory to hide so that it won't
* get "touched" at all by U-Boot. By fixing up gd->ram_size
* the Linux kernel should now get passed the now "corrected"
- * memory size and won't touch it either. This should work
- * for arch/ppc and arch/powerpc. Only Linux board ports in
- * arch/powerpc with bootwrapper support, that recalculate the
- * memory size from the SDRAM controller setup will have to
- * get fixed.
+ * memory size and won't touch it either. This has been used
+ * by arch/powerpc exclusively. Now ARMv8 takes advantage of
+ * thie mechanism. If memory is split into banks, addresses
+ * need to be calculated.
*/
- gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
-#endif
+ gd->ram_size = board_reserve_ram_top(gd->ram_size);
+
#ifdef CONFIG_SYS_SDRAM_BASE
gd->ram_top = CONFIG_SYS_SDRAM_BASE;
#endif
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 969aed6..4ae7d11 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -195,10 +195,9 @@ unsigned long long get_qixis_addr(void);
* 512MB aligned, so the min size to hide is 512MB.
*/
#if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER)
-#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024)
+#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (254UL * 1024 * 1024)
#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024)
-#define CONFIG_SYS_MEM_TOP_HIDE_MIN (512UL * 1024 * 1024)
-#define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide()
+#define CONFIG_SYS_MC_RSV_MEM_ALIGN (512UL * 1024 * 1024)
#endif
/* PCIe */
@@ -290,10 +289,6 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
-#ifndef __ASSEMBLY__
-unsigned long get_dram_size_to_hide(void);
-#endif
-
#define CONFIG_PANIC_HANG /* do not reset board on panic */
#define CONFIG_SPL_BSS_START_ADDR 0x80100000
--
1.7.9.5
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