[U-Boot] [PATCH 3/3] rockchip: Use the debug UART on rk3036

[Simon Glass]

Rather than using a new debug UART implementation, use the standard one
provided by U-Boot.
Signed-off-by: Simon Glass <sjg at chromium.org>
---

 arch/arm/mach-rockchip/Makefile           |  1 -
 arch/arm/mach-rockchip/rk3036-board-spl.c |  9 ++++-
 arch/arm/mach-rockchip/rk_early_print.c   | 63 -------------------------------
 configs/evb-rk3036_defconfig              |  6 +++
 include/configs/rk3036_common.h           |  2 +
 5 files changed, 16 insertions(+), 65 deletions(-)
 delete mode 100644 arch/arm/mach-rockchip/rk_early_print.c

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index b703c3c..1cc4a96 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -11,7 +11,6 @@ else
 obj-$(CONFIG_ROCKCHIP_RK3288) += board.o
 endif
 obj-y += rk_timer.o
-obj-y += rk_early_print.o
 obj-$(CONFIG_$(SPL_)ROCKCHIP_COMMON) += common.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 3a1491c..8015481 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <debug_uart.h>
 #include <asm/io.h>
 #include <asm/arch/grf_rk3036.h>
 #include <asm/arch/hardware.h>
@@ -34,7 +35,7 @@ void board_init_f(ulong dummy)
 		     GPIO1C2_MASK << GPIO1C2_SHIFT,
 		     GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |
 		     GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
-	rk_uart_init((void *)DEBUG_UART_BASE);
+	debug_uart_init();
 #endif
 	rockchip_timer_init();
 	sdram_init();
@@ -53,3 +54,9 @@ void board_init_r(gd_t *id, ulong dest_addr)
 	while (1)
 		;
 }
+
+void hang(void)
+{
+	while (1)
+		;
+}
diff --git a/arch/arm/mach-rockchip/rk_early_print.c b/arch/arm/mach-rockchip/rk_early_print.c
deleted file mode 100644
index a1c14b0..0000000
--- a/arch/arm/mach-rockchip/rk_early_print.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <asm/io.h>
-#include <asm/arch/uart.h>
-#include <common.h>
-
-static struct rk_uart *uart_ptr;
-
-static void uart_wrtie_byte(char byte)
-{
-	writel(byte, &uart_ptr->rbr);
-	while (!(readl(&uart_ptr->lsr) & 0x40))
-		;
-}
-
-void print(char *s)
-{
-	while (*s) {
-		if (*s == '\n')
-			uart_wrtie_byte('\r');
-	    uart_wrtie_byte(*s);
-	    s++;
-	}
-}
-
-void print_hex(unsigned int n)
-{
-	int i;
-	int temp;
-
-	uart_wrtie_byte('0');
-	uart_wrtie_byte('x');
-
-	for (i = 8; i > 0; i--) {
-		temp = (n >> (i - 1) * 4) & 0x0f;
-		if (temp < 10)
-			uart_wrtie_byte((char)(temp + '0'));
-		else
-			uart_wrtie_byte((char)(temp - 10 + 'a'));
-	}
-	uart_wrtie_byte('\n');
-	uart_wrtie_byte('\r');
-}
-
-/*
- * TODO: since rk3036 only 4K sram to use in SPL, for saving space,
- * we implement uart driver this way, we should convert this to use
- * ns16550 driver in future, which support DEBUG_UART in the standard way
- */
-void rk_uart_init(void *base)
-{
-	uart_ptr = (struct rk_uart *)base;
-	writel(0x83, &uart_ptr->lcr);
-	writel(0x0d, &uart_ptr->rbr);
-	writel(0x03, &uart_ptr->lcr);
-
-	/* fifo enable, sfe is shadow register of FCR[0] */
-	writel(0x01, &uart_ptr->sfe);
-}
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 2e915ff..c196bd6 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -24,3 +24,9 @@ CONFIG_DM_MMC=y
 CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_NS16550=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+# CONFIG_SPL_SERIAL_PRESENT is not set
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index f753e68..d22ea74 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -24,6 +24,8 @@
 #define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
+#define CONFIG_SPL_SERIAL_SUPPORT
+
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_MEM32
 
-- 
2.6.0.rc2.230.g3dd15c0