[U-Boot] [PATCH v2 2/7] dm: pci: Add a function to write a BAR
Simon Glass
sjg at chromium.org
Thu Dec 17 05:12:31 CET 2015
Add a driver-model version of the pci_write_bar32 function so that this is
supported in the new API.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
Changes in v2:
- Rename the last parameter to 'addr'
- Update the comment to explain usable of this function
drivers/pci/pci-uclass.c | 8 ++++++++
include/pci.h | 17 +++++++++++++++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 6dd4883..61292d7 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1053,6 +1053,14 @@ u32 dm_pci_read_bar32(struct udevice *dev, int barnum)
return addr & PCI_BASE_ADDRESS_MEM_MASK;
}
+void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr)
+{
+ int bar;
+
+ bar = PCI_BASE_ADDRESS_0 + barnum * 4;
+ dm_pci_write_config32(dev, bar, addr);
+}
+
static int _dm_pci_bus_to_phys(struct udevice *ctlr,
pci_addr_t bus_addr, unsigned long flags,
unsigned long skip_mask, phys_addr_t *pa)
diff --git a/include/pci.h b/include/pci.h
index cb2562f..96f9189 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -757,7 +757,9 @@ extern void pci_mpc85xx_init (struct pci_controller *hose);
/**
* pci_write_bar32() - Write the address of a BAR including control bits
*
- * This writes a raw address (with control bits) to a bar
+ * This writes a raw address (with control bits) to a bar. This can be used
+ * with devices which require hard-coded addresses, not part of the normal
+ * PCI enumeration process.
*
* @hose: PCI hose to use
* @dev: PCI device to update
@@ -765,7 +767,7 @@ extern void pci_mpc85xx_init (struct pci_controller *hose);
* @addr: BAR address with control bits
*/
void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,
- u32 addr_and_ctrl);
+ u32 addr);
/**
* pci_read_bar32() - read the address of a bar
@@ -1167,6 +1169,17 @@ int pci_get_regions(struct udevice *dev, struct pci_region **iop,
struct pci_region **memp, struct pci_region **prefp);
/**
+ * dm_pci_write_bar32() - Write the address of a BAR including control bits
+ *
+ * This writes a raw address (with control bits) to a bar
+ *
+ * @dev: PCI device to update
+ * @barnum: BAR number (0-5)
+ * @addr: BAR address with control bits
+ */
+void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr_and_ctrl);
+
+/**
* dm_pci_read_bar32() - read a base address register from a device
*
* @dev: Device to check
--
2.6.0.rc2.230.g3dd15c0
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