[U-Boot] [PATCH 2/2] arm: imx6: Enable DDR calibration on Novena
Marek Vasut
marex at denx.de
Tue Dec 22 02:26:41 CET 2015
On Sunday, December 20, 2015 at 08:33:58 PM, Eric Nelson wrote:
> Hi Marek,
>
> On 12/16/2015 07:40 AM, Marek Vasut wrote:
> > Enable the DDR calibration functionality on Novena to deal with the
> > memory SoDIMM on this board.
>
> Shouldn't this be in two patches?
Not really, the old values work without the enabled calibration. This
change needs to be done atomically.
[...]
> > static void ccgr_init(void)
> >
> > @@ -601,6 +601,11 @@ void board_init_f(ulong dummy)
> >
> > mx6dq_dram_iocfg(64, &novena_ddr_ioregs, &novena_grp_ioregs);
> > mx6_dram_cfg(&novena_ddr_info, &novena_mmdc_calib, &elpida_4gib_1600);
> >
> > + /* Perform DDR DRAM calibration */
> > + udelay(100);
>
> Shouldn't the return values be tested?
I guess yes, but if the calibration fails, that what ? It's game over ;-)
I will just change those functions to void type and do hang() if we get errors.
I believe that's the most sane way to handle it and it prevents development of
boilerplate code.
> > + mmdc_do_write_level_calibration();
> > + mmdc_do_dqs_calibration();
> > +
> >
> > /* Clear the BSS. */
> > memset(__bss_start, 0, __bss_end - __bss_start);
Best regards,
Marek Vasut
More information about the U-Boot
mailing list