[U-Boot] [PATCH v4 3/8] mips: add base support for atheros ath79 based SOCs

Wills Wang wills.wang at live.com
Sun Dec 27 10:37:39 CET 2015



On 12/27/2015 01:01 AM, Daniel Schwierzeck wrote:
>>>> +    u32 id, major, minor;
>>>> +    u32 rev = 0;
>>>> +    u32 ver = 1;
>>>> +
>>>> +    id = readl(KSEG1ADDR(AR71XX_RESET_BASE + AR71XX_RESET_REG_REV_ID));
>>>> +    major = id & REV_ID_MAJOR_MASK;
>>>> +
>>>> +    switch (major) {
>>>> +    case REV_ID_MAJOR_AR71XX:
>>>> +        minor = id & AR71XX_REV_ID_MINOR_MASK;
>>>> +        rev = id >> AR71XX_REV_ID_REVISION_SHIFT;
>>>> +        rev &= AR71XX_REV_ID_REVISION_MASK;
>>>> +        switch (minor) {
>>> I did review this already and my suggestions were ignored :-( I stop
>>> here ...
>> Sorry, I forget this.
>> This code inherit from kernel, to change would maintain it much more
>> difficult.
> I agree with Marek that a lookup table would be better. But why do you
> want to add all possible QCA based SoC's? Until there is no supported
> board for other SoC's than yours, this would be dead code.
>
The shift bits of minor and revision is different for same chips, same chips
should ignore the minor bits,  the lookup table must store these shift
information and which was ignored in common, so the table will become more
complex if this code want to be compatible with many other SOCs.
If people want to add other QCA's SoC, need spend a great deal of time
to debug this code.

-- 
Best Regards
Wills



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