[U-Boot] [PATCH v3 1/4] mips: add base support for atheros ath79 based SOCs

[Wills Wang]

On 12/27/2015 06:09 PM, Marek Vasut wrote:
> On Sunday, December 27, 2015 at 09:07:36 AM, Wills Wang wrote:
>> On 12/27/2015 03:38 PM, Marek Vasut wrote:
>>> On Sunday, December 27, 2015 at 08:33:26 AM, Wills Wang wrote:
>>>> On 12/27/2015 02:37 AM, Marek Vasut wrote:
>>>>> On Saturday, December 26, 2015 at 07:29:51 PM, Wills Wang wrote:
>>>>>> WASP is ar9341.
>>>>> Please do not top post.
>>>>>
>>>>> Did you try if the memory is accessible on your platform ? AR9331 I
>>>>> have here has the SRAM at 0xbd007000 , just like that machine in [1] .
>>>> I found there is a memory segment at 0xbd000000...0xbd007fff. it's
>>>> independent of DDR physical memory, can be read and wrote, but
>>>> hardware can't boot up if don't execute lowlevel_init.S when define
>>>> CONFIG_SYS_INIT_SP_ADDR=0xbd007000 to set C stack into SRAM.
>>> Stack grows down, so of course if you put stack at the beginning of SRAM,
>>> that cannot work ;-) Put it at the end , 0xbd008000.
>> This memory segment was mapped circularly at 0xbd000000...0xbdffffff.
> So is this area at 0xbd008000 usable for stack or not ?
Same times board can boot up, but in a very unstable. i use the 
following setting:

#define CONFIG_SYS_INIT_RAM_ADDR    0xbd000000
#define CONFIG_SYS_INIT_RAM_SIZE    (32 * SZ_1K)

#define CONFIG_SYS_INIT_SP_OFFSET \
     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
     (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

> Best regards,
> Marek Vasut
>
>

-- 
Best Regards
Wills